Narendra Singh Dhakad

Orcid: 0000-0003-2848-1785

According to our database1, Narendra Singh Dhakad authored at least 7 papers between 2021 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
In-Memory Computing with 6T SRAM for Multi-operator Logic Design.
Circuits Syst. Signal Process., January, 2024

SHA-CNN: Scalable Hierarchical Aware Convolutional Neural Network for Edge AI.
CoRR, 2024

Configurable Multi-Port Memory Architecture for High-Speed Data Communication.
CoRR, 2024

2023
A Configurable Activation Function for Variable Bit-Precision DNN Hardware Accelerators.
Proceedings of the Internet of Things. Advances in Information and Communication Technology, 2023

2022
Data multiplexed and hardware reused architecture for deep neural network accelerator.
Neurocomputing, 2022

BitMAC: Bit-Serial Computation-Based Efficient Multiply-Accumulate Unit for DNN Accelerator.
Circuits Syst. Signal Process., 2022

2021
Voltage Bootstrapped Schmitt Trigger based Radiation Hardened Latch Design for Reliable Circuits.
Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021


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