Narayanan Vijaykrishnan
Orcid: 0000-0001-6266-6068Affiliations:
- Penn State, University Park, USA
According to our database1,
Narayanan Vijaykrishnan
authored at least 541 papers
between 1996 and 2024.
Collaborative distances:
Collaborative distances:
Awards
ACM Fellow
ACM Fellow 2014, "For contributions to power estimation and optimization in the design of power-aware systems.".
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
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on orcid.org
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on cse.psu.edu
On csauthors.net:
Bibliography
2024
Cramming More Weight Data Onto Compute-in-Memory Macros for High Task-Level Energy Efficiency Using Custom ROM With 3984-kb/mm<sup>2</sup> Density in 65-nm CMOS.
IEEE J. Solid State Circuits, June, 2024
ACM Trans. Design Autom. Electr. Syst., May, 2024
ACM Trans. Design Autom. Electr. Syst., March, 2024
An Efficient Edge-Cloud Partitioning of Random Forests for Distributed Sensor Networks.
IEEE Embed. Syst. Lett., March, 2024
ProtFe: Low-Cost Secure Power Side-Channel Protection for General and Custom FeFET-Based Memories.
ACM Trans. Design Autom. Electr. Syst., January, 2024
ACM J. Emerg. Technol. Comput. Syst., January, 2024
GRAPHIC: Gather and Process Harmoniously in the Cache With High Parallelism and Flexibility.
IEEE Trans. Emerg. Top. Comput., 2024
Synergistic and Efficient Edge-Host Communication for Energy Harvesting Wireless Sensor Networks.
CoRR, 2024
Can Prompt Modifiers Control Bias? A Comparative Analysis of Text-to-Image Generative Models.
CoRR, 2024
Paving the Way for Pass Disturb Free Vertical NAND Storage via A Dedicated and String-Compatible Pass Gate.
CoRR, 2024
Proceedings of the 38th ACM SIGSIM Conference on Principles of Advanced Discrete Simulation, 2024
Proceedings of the 57th IEEE/ACM International Symposium on Microarchitecture, 2024
Using Isoefficiency as a Metric to Assess Disaggregated Memory Systems for High Performance Computing.
Proceedings of the International Symposium on Memory Systems, 2024
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024
Proceedings of the 25th International Symposium on Quality Electronic Design, 2024
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024
TroScan: Enhancing On-Chip Delivery Resilience to Physical Attack Through Frequency-Triggered Key Generation.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
CafeHD: A Charge-Domain FeFET-Based Compute-in-Memory Hyperdimensional Encoder with Hypervector Merging.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2024
Multi-Modal Fusion of Event and RGB for Monocular Depth Estimation Using a Unified Transformer-based Architecture.
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2024
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024
ZEBRA: A Zero-Bit Robust-Accumulation Compute-In-Memory Approach for Neural Network Acceleration Utilizing Different Bitwise Patterns.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024
2023
FAST: A Fully-Concurrent Access SRAM Topology for High Row-Wise Parallelism Applications Based on Dynamic Shift Operations.
IEEE Trans. Circuits Syst. II Express Briefs, April, 2023
Circuits Syst. Signal Process., February, 2023
FeFET-Based Logic-in-Memory Supporting SA-Free Write-Back and Fully Dynamic Access With Reduced Bitline Charging Activity and Recycled Bitline Charge.
IEEE Trans. Circuits Syst. I Regul. Pap., 2023
Reimagining Sense Amplifiers: Harnessing Phase Transition Materials for Current and Voltage Sensing.
CoRR, 2023
CoRR, 2023
Powering Disturb-Free Reconfigurable Computing and Tunable Analog Electronics with Dual-Port Ferroelectric FET.
CoRR, 2023
Proceedings of the 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems, 2023
Proceedings of the 24th ACM SIGPLAN/SIGBED International Conference on Languages, 2023
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2023
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2023
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2023
Design Exploration of Dynamic Multi-Level Ternary Content-Addressable Memory Using Nanoelectromechanical Relays.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2023
Multi-Exit Vision Transformer with Custom Fine-Tuning for Fine-Grained Image Recognition.
Proceedings of the IEEE International Conference on Image Processing, 2023
Proceedings of the IEEE International Conference on Image Processing, 2023
Lowering Latency of Embedded Memory by Exploiting In-Cell Victim Cache Hierarchy Based on Emerging Multi-Level Memory Devices.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
Proceedings of the Device Research Conference, 2023
Token Adaptive Vision Transformer with Efficient Deployment for Fine-Grained Image Recognition.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
ASMCap: An Approximate String Matching Accelerator for Genome Sequence Analysis Based on Capacitive Content Addressable Memory.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Victor: A Variation-resilient Approach Using Cell-Clustered Charge-domain computing for High-density High-throughput MLC CiM.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Cryogenic In-Memory Matrix-Vector Multiplication using Ferroelectric Superconducting Quantum Interference Device (FE-SQUID).
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
WeightLock: A Mixed-Grained Weight Encryption Approach Using Local Decrypting Units for Ciphertext Computing in DNN Accelerators.
Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023
2022
CapCAM: A Multilevel Capacitive Content Addressable Memory for High-Accuracy and High-Scalability Search and Compute Applications.
IEEE Trans. Very Large Scale Integr. Syst., 2022
IEEE Trans. Parallel Distributed Syst., 2022
ACM Trans. Access. Comput., 2022
CoRR, 2022
Ferroelectric FET based Context-Switching FPGA Enabling Dynamic Reconfiguration for Adaptive Deep Learning Machines.
CoRR, 2022
Ferroelectric FET-based strong physical unclonable function: a low-power, high-reliable and reconfigurable solution for Internet-of-Things security.
CoRR, 2022
GRAPHIC: GatheR-And-Process in Highly parallel with In-SSD Compression Architecture in Very Large-Scale Graph.
CoRR, 2022
ALL-MASK: A Reconfigurable Logic Locking Method for Multicore Architecture with Sequential-Instruction-Oriented Key.
CoRR, 2022
CMOS-Compatible Ising Machines built using Bistable Latches Coupled through Ferroelectric Transistor Arrays.
CoRR, 2022
FAST: A Fully-Concurrent Access Technique to All SRAM Rows for Enhanced Speed and Energy Efficiency in Data-Intensive Applications.
CoRR, 2022
Seeker: Synergizing Mobile and Energy Harvesting Wearable Sensors for Human Activity Recognition.
CoRR, 2022
Asymmetric Double-Gate Ferroelectric FET to Decouple the Tradeoff Between Thickness Scaling and Memory Window.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Robust Multimodal Depth Estimation using Transformer based Generative Adversarial Networks.
Proceedings of the MM '22: The 30th ACM International Conference on Multimedia, Lisboa, Portugal, October 10, 2022
Skipper: Enabling efficient SNN training through activation-checkpointing and time-skipping.
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022
Proceedings of the LCTES '22: 23rd ACM SIGPLAN/SIGBED International Conference on Languages, 2022
Proceedings of the KDD '22: The 28th ACM SIGKDD Conference on Knowledge Discovery and Data Mining, Washington, DC, USA, August 14, 2022
Performance Evaluation of Video Analytics Workloads on Emerging Processing-In-Memory Architectures.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022
An 8T/Cell FeFET-Based Nonvolatile SRAM with Improved Density and Sub-fJ Backup and Restore Energy.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022
Proceedings of the Device Research Conference, 2022
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
Proceedings of the 29th International Conference on Computational Linguistics, 2022
2021
DyTAN: Dynamic Ternary Content Addressable Memory Using Nanoelectromechanical Relays.
IEEE Trans. Very Large Scale Integr. Syst., 2021
IEEE Trans. Very Large Scale Integr. Syst., 2021
MaxTracker: Continuously Tracking the Maximum Computation Progress for Energy Harvesting ReRAM-based CNN Accelerators.
ACM Trans. Embed. Comput. Syst., 2021
IEEE Micro, 2021
Exploiting Activation based Gradient Output Sparsity to Accelerate Backpropagation in CNNs.
CoRR, 2021
CoRR, 2021
Proceedings of the IEEE International Conference on Networking, Architecture and Storage, 2021
Sparse to Dense Depth Completion using a Generative Adversarial Network with Intelligent Sampling Strategies.
Proceedings of the MM '21: ACM Multimedia Conference, Virtual Event, China, October 20, 2021
Proceedings of the KDD '21: The 27th ACM SIGKDD Conference on Knowledge Discovery and Data Mining, 2021
Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021
Gesture-SNN: Co-optimizing accuracy, latency and energy of SNNs for neuromorphic vision sensors.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021
Crossbar based Processing in Memory Accelerator Architecture for Graph Convolutional Networks.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021
Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021
Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021
Origin: Enabling On-Device Intelligence for Human Activity Recognition Using Energy Harvesting Wireless Sensor Networks.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Design space for scaling-in general purpose computing within the DDR DRAM hierarchy for map-reduce workloads.
Proceedings of the CF '21: Computing Frontiers Conference, 2021
2020
J. Signal Process. Syst., 2020
IEEE Trans. Circuits Syst., 2020
Optimization of Intercache Traffic Entanglement in Tagless Caches With Tiling Opportunities.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
IEEE J. Sel. Areas Commun., 2020
IEEE Des. Test, 2020
Proceedings of the 2020 IFIP Networking Conference, 2020
Look-Up Table based Energy Efficient Processing in Cache Support for Neural Network Acceleration.
Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020
Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020
Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020
Proceedings of the 21st International Symposium on Quality Electronic Design, 2020
FeFET-based low-power bitwise logic-in-memory with direct write-back and data-adaptive dynamic sensing interface.
Proceedings of the ISLPED '20: ACM/IEEE International Symposium on Low Power Electronics and Design, 2020
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020
GaaS-X: Graph Analytics Accelerator Supporting Sparse Data Representation using Crossbar Architectures.
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020
Proceedings of the 40th IEEE International Conference on Distributed Computing Systems, 2020
ResiRCA: A Resilient Energy Harvesting ReRAM Crossbar-Based Accelerator for Intelligent Embedded Processors.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020
Design Insights of Non-volatile Processors and Accelerators in Energy Harvesting Systems.
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020
PSB-RNN: A Processing-in-Memory Systolic Array Architecture using Block Circulant Matrices for Recurrent Neural Networks.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
AIGuide: An Augmented Reality Hand Guidance Application for People with Visual Impairments.
Proceedings of the ASSETS '20: The 22nd International ACM SIGACCESS Conference on Computers and Accessibility, 2020
2019
IEEE Trans. Very Large Scale Integr. Syst., 2019
ROBIN: Monolithic-3D SRAM for Enhanced Robustness with In-Memory Computation Support.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
Byzantine-Tolerant Inference in Distributed Deep Intelligent System: Challenges and Opportunities.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2019
IEEE Des. Test, 2019
Context-Aware Collaborative Object Recognition For Distributed Multi Camera Time Series Data.
Proceedings of the Tenth International Symposium on Information and Communication Technology, 2019
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2019
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Programmable Non-Volatile Memory Design Featuring Reconfigurable In-Memory Operations.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Mixed Precision Quantization Scheme for Re-configurable ReRAM Crossbars Targeting Different Energy Harvesting Scenarios.
Proceedings of the Internet of Things. A Confluence of Many Disciplines, 2019
Context-Aware Convolutional Neural Network over Distributed System in Collaborative Computing.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
2018
Compact 3-D-SRAM Memory With Concurrent Row and Column Data Access Capability Using Sequential Monolithic 3-D Integration.
IEEE Trans. Very Large Scale Integr. Syst., 2018
IEEE Trans. Very Large Scale Integr. Syst., 2018
IAA: Incidental Approximate Architectures for Extremely Energy-Constrained Energy Harvesting Scenarios using IoT Nonvolatile Processors.
IEEE Micro, 2018
ACM J. Emerg. Technol. Comput. Syst., 2018
Noise Aware Power Adaptive Partitioned Deep Networks for Mobile Visual Assist Platforms.
Proceedings of the 31st IEEE International System-on-Chip Conference, 2018
Proceedings of the 2018 IEEE International Workshop on Signal Processing Systems, 2018
Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018
Dual Mode Ferroelectric Transistor based Non-Volatile Flip-Flops for Intermittently-Powered Systems.
Proceedings of the International Symposium on Low Power Electronics and Design, 2018
A Monolithic-3D SRAM Design with Enhanced Robustness and In-Memory Computation Support.
Proceedings of the International Symposium on Low Power Electronics and Design, 2018
Stochastic Functional Verification of DNN Design through Progressive Virtual Dataset Generation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the IEEE International Conference on Consumer Electronics, 2018
Heuristic Approximation of Early-Stage CNN Data Representation for Vision Intelligence Systems.
Proceedings of the 36th IEEE International Conference on Computer Design, 2018
Proceedings of the International Conference on Computer-Aided Design, 2018
Proceedings of the Twenty-Third International Conference on Architectural Support for Programming Languages and Operating Systems, 2018
2017
IEEE Trans. Very Large Scale Integr. Syst., 2017
Dynamic Power and Energy Management for Energy Harvesting Nonvolatile Processor Systems.
ACM Trans. Embed. Comput. Syst., 2017
Maximum Energy Efficiency Tracking Circuits for Converter-Less Energy Harvesting Sensor Nodes.
IEEE Trans. Circuits Syst. II Express Briefs, 2017
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
Always-On Speech Recognition Using TrueNorth, a Reconfigurable, Neurosynaptic Processor.
IEEE Trans. Computers, 2017
A Multitask Grocery Assist System for the Visually Impaired: Smart glasses, gloves, and shopping carts provide auditory and tactile feedback.
IEEE Consumer Electron. Mag., 2017
Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017
Improving FPGA Design with Monolithic 3D Integration Using High Dense Inter-Stack Via.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017
Proceedings of the 18th International Symposium on Quality Electronic Design, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Co-training of Feature Extraction and Classification using Partitioned Convolutional Neural Networks.
Proceedings of the 54th Annual Design Automation Conference, 2017
Proceedings of the 2017 CHI Conference on Human Factors in Computing Systems, 2017
Spendthrift: Machine learning based resource and frequency scaling for ambient energy harvesting nonvolatile processors.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
2016
IEEE Trans. Very Large Scale Integr. Syst., 2016
Exploration of Low-Power High-SFDR Current-Steering D/A Converter Design Using Steep-Slope Heterojunction Tunnel FETs.
IEEE Trans. Very Large Scale Integr. Syst., 2016
Diagnosis and Synthesis for Defective Reconfigurable Single-Electron Transistor Arrays.
IEEE Trans. Very Large Scale Integr. Syst., 2016
ACM Trans. Design Autom. Electr. Syst., 2016
IEEE Trans. Multi Scale Comput. Syst., 2016
Robotics Auton. Syst., 2016
Nonvolatile Processor Architectures: Efficient, Reliable Progress with Unstable Power.
IEEE Micro, 2016
Comparative Area and Parasitics Analysis in FinFET and Heterojunction Vertical TFET Standard Cells.
ACM J. Emerg. Technol. Comput. Syst., 2016
Enabling Internet-of-Things with Opportunities Brought by Emerging Devices, Circuits and Architectures.
Proceedings of the VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification and Reliability, 2016
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016
Proceedings of the 2016 International Symposium on Low Power Electronics and Design, 2016
Proceedings of the 2016 International Joint Conference on Neural Networks, 2016
Proceedings of the 53rd Annual Design Automation Conference, 2016
2015
IEEE Trans. Very Large Scale Integr. Syst., 2015
IEEE Micro, 2015
ACM J. Emerg. Technol. Comput. Syst., 2015
Proceedings of the 28th International Conference on VLSI Design, 2015
A High-Efficiency Switched-Capacitance HTFET Charge Pump for Low-Input-Voltage Applications.
Proceedings of the 28th International Conference on VLSI Design, 2015
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
Comparing Energy, Area, Delay Tradeoffs in Going Vertical with CMOS and Asymmetric HTFETs.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
Single-Ended and Differential MRAMs Based on Spin Hall Effect: A Layout-Aware Design Perspective.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
Exploring memory controller configurations for many-core systems with 3D stacked DRAMs.
Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015
Intelligent Vision Systems: Exploring the State-of-the-Art and Opportunities for the Future.
Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2015
Dynamic Machine Learning Based Matching of Nonvolatile Processor Microarchitecture to Harvested Energy Profile.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015
Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015
Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015
Visual co-occurrence network: using context for large-scale object recognition in retail.
Proceedings of the 13th IEEE Symposium on Embedded Systems For Real-time Multimedia, 2015
Platform-aware dynamic configuration support for efficient text processing on heterogeneous system.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the 2015 International Conference on Compilers, 2015
A defect-aware approach for mapping reconfigurable Single-Electron Transistor arrays.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015
2014
Accelerating Multiresolution Gabor Feature Extraction for Real Time Vision Applications.
J. Signal Process. Syst., 2014
ACM Trans. Embed. Comput. Syst., 2014
Optimizing the NoC Slack Through Voltage and Frequency Scaling in Hard Real-Time Embedded Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
IEEE J. Emerg. Sel. Topics Circuits Syst., 2014
Proceedings of the 22nd International Conference on Very Large Scale Integration, 2014
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014
Independently-Controlled-Gate FinFET 6T SRAM Cell Design for Leakage Current Reduction and Enhanced Read Access Speed.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014
Tunnel FET-based ultra-low power, low-noise amplifier design for bio-signal acquisition.
Proceedings of the International Symposium on Low Power Electronics and Design, 2014
An examination of the architecture and system-level tradeoffs of employing steep slope devices in 3D CMPs.
Proceedings of the ACM/IEEE 41st International Symposium on Computer Architecture, 2014
Proceedings of the 32nd IEEE International Conference on Computer Design, 2014
Refresh Enabled Video Analytics (REVA): Implications on power and performance of DRAM supported embedded visual systems.
Proceedings of the 32nd IEEE International Conference on Computer Design, 2014
A hardware accelerated multilevel visual classifier for embedded visual-assist systems.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014
Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014
Proceedings of the 2014 IEEE Global Conference on Signal and Information Processing, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
2013
J. Signal Process. Syst., 2013
ACM J. Emerg. Technol. Comput. Syst., 2013
Design of energy-efficient circuits and systems using tunnel field effect transistors.
IET Circuits Devices Syst., 2013
Proceedings of the 26th International Conference on VLSI Design and 12th International Conference on Embedded Systems, 2013
Staggered latch bus: A reliable offset switched architecture for long on-chip interconnect.
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013
Saliency-driven dynamic configuration of HMAX for energy-efficient multi-object recognition.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2013
Evaluation of tunnel FET-based flip-flop designs for low power, high performance applications.
Proceedings of the International Symposium on Quality Electronic Design, 2013
EMERALD: Characterization of emerging applications and algorithms for low-power devices.
Proceedings of the 2012 IEEE International Symposium on Performance Analysis of Systems & Software, 2013
Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013
Steep switching tunnel FET: A promise to extend the energy efficient roadmap for post-CMOS digital and analog/RF applications.
Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013
Dynamic bandwidth adaptation using recognition accuracy prediction through pre-classification for embedded vision systems.
Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013
Proceedings of the IEEE International Conference on Acoustics, 2013
Proceedings of the 19th IEEE International Symposium on High Performance Computer Architecture, 2013
A Configurable Architecture for a Visual Saliency System and Its Application in Retail.
Proceedings of the 21st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2013
Proceedings of the Design, Automation and Test in Europe, 2013
On reconfigurable single-electron transistor arrays synthesis using reordering techniques.
Proceedings of the Design, Automation and Test in Europe, 2013
Designing energy-efficient NoC for real-time embedded systems through slack optimization.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2013
ShieldUS: A novel design of dynamic shielding for eliminating 3D TSV crosstalk coupling noise.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013
2012
ACM Trans. Design Autom. Electr. Syst., 2012
Power Analysis Attack Resistance Engineering by Dynamic Voltage and Frequency Scaling.
ACM Trans. Embed. Comput. Syst., 2012
IPSJ Trans. Syst. LSI Des. Methodol., 2012
Proceedings of the 2012 IEEE Workshop on Signal Processing Systems, 2012
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012
Proceedings of the International Symposium on Low Power Electronics and Design, 2012
Mitigating electromigration of power supply networks using bidirectional current stress.
Proceedings of the Great Lakes Symposium on VLSI 2012, 2012
Proceedings of the 2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, 2012
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
Performance enhancement under power constraints using heterogeneous CMOS-TFET multicores.
Proceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis, 2012
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
A reconfigurable platform for the design and verification of domain-specific accelerators.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
2011
Proceedings of the 3D Integration for NoC-based SoC Architectures, 2011
FPGA Architecture for 2D Discrete Fourier Transform Based on 2D Decomposition for Large-sized Data.
J. Signal Process. Syst., 2011
IEEE Trans. Circuits Syst. I Regul. Pap., 2011
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
J. Parallel Distributed Comput., 2011
IEEE J. Emerg. Sel. Topics Circuits Syst., 2011
Guest Editorial Advances in Design of Energy-Efficient Circuits and Systems (Second Issue).
IEEE J. Emerg. Sel. Topics Circuits Syst., 2011
Proceedings of the IEEE Workshop on Signal Processing Systems, 2011
Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures, 2011
Towards Resilient Micro-architectures: Datapath Reliability Enhancement Using STT-MRAM.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011
Improving energy efficiency of multi-threaded applications using heterogeneous CMOS-TFET multicores.
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011
Proceedings of the 38th International Symposium on Computer Architecture (ISCA 2011), 2011
Proceedings of the 38th International Symposium on Computer Architecture (ISCA 2011), 2011
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011
A streaming FPGA implementation of a steerable filter for real-time applications (abstract only).
Proceedings of the ACM/SIGDA 19th International Symposium on Field Programmable Gate Arrays, 2011
An FPGA Implementation of Information Theoretic Visual-Saliency System and Its Optimization.
Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
Proceedings of the 48th Design Automation Conference, 2011
An algorithm-architecture co-design framework for gridding reconstruction using FPGAs.
Proceedings of the 48th Design Automation Conference, 2011
Proceedings of the 48th Design Automation Conference, 2011
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2011
FPGA-accelerator system for computing biologically inspired feature extraction models.
Proceedings of the Conference Record of the Forty Fifth Asilomar Conference on Signals, 2011
2010
Lecture Notes in Electrical Engineering 45, Springer, ISBN: 978-90-481-3030-6, 2010
J. Signal Process. Syst., 2010
IEEE Trans. Dependable Secur. Comput., 2010
Energy-Delay Performance of Nanoscale Transistors Exhibiting Single Electron Behavior and Associated Logic Circuits.
J. Low Power Electron., 2010
Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010
Proceedings of the IEEE International Conference on Acoustics, 2010
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010
Proceedings of the 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2010
AutoFLEX: A Framework for Image Processing Applications on Multiple-FPGA Systems.
Proceedings of the 2010 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2010
Proceedings of the Design, Automation and Test in Europe, 2010
A GPU based implementation of Center-Surround Distribution Distance for feature extraction and matching.
Proceedings of the Design, Automation and Test in Europe, 2010
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010
A novel si-tunnel FET based SRAM design for ultra low-power 0.3V V<sub><i>DD</i></sub> applications.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010
2009
Compiler-assisted soft error detection under performance and energy constraints in embedded systems.
ACM Trans. Embed. Comput. Syst., 2009
IEEE Trans. Dependable Secur. Comput., 2009
IEEE Trans. Circuits Syst. I Regul. Pap., 2009
IEEE Trans. Computers, 2009
An Automated Framework for Accelerating Numerical Algorithms on Reconfigurable Platforms Using Algorithmic/Architectural Optimization.
IEEE Trans. Computers, 2009
<i>New-Age</i>: A Negative Bias Temperature Instability-Estimation Framework for Microarchitectural Components.
Int. J. Parallel Program., 2009
Int. J. Distributed Sens. Networks, 2009
Predicting the performance and reliability of future field programmable gate arrays routing architectures with carbon nanotube bundle interconnect.
IET Circuits Devices Syst., 2009
Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009
Proceedings of the Nano-Net - 4th International ICST Conference, 2009
Power and area reduction using carbon nanotube bundle interconnect in global clock tree distribution network.
Proceedings of the 2009 IEEE/ACM International Symposium on Nanoscale Architectures, 2009
Proceedings of the 10th International Workshop on Microprocessor Test and Verification, 2009
Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2009
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2009
Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs.
Proceedings of the 15th International Conference on High-Performance Computer Architecture (HPCA-15 2009), 2009
Proceedings of the High Performance Embedded Architectures and Compilers, 2009
Proceedings of the Design, Automation and Test in Europe, 2009
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009
2008
IEEE Trans. Very Large Scale Integr. Syst., 2008
IEEE Trans. Very Large Scale Integr. Syst., 2008
IEEE Trans. Very Large Scale Integr. Syst., 2008
Exploring architectural solutions for energy optimisations in bus-based system-on-chip.
IET Comput. Digit. Tech., 2008
Proceedings of the IEEE Workshop on Signal Processing Systems, 2008
Proceedings of the 2008 IEEE International Symposium on Nanoscale Architectures, 2008
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008
Impact of dynamic voltage and frequency scaling on the architectural vulnerability of GALS architectures.
Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008
Proceedings of the 35th International Symposium on Computer Architecture (ISCA 2008), 2008
Proceedings of the 26th International Conference on Computer Design, 2008
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008
Performance and power optimization through data compression in Network-on-Chip architectures.
Proceedings of the 14th International Conference on High-Performance Computer Architecture (HPCA-14 2008), 2008
Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008
Proceedings of the 16th IEEE International Symposium on Field-Programmable Custom Computing Machines, 2008
Proceedings of the 38th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2008
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008
2007
IEEE Trans. Syst. Man Cybern. Part C, 2007
OS-Aware Branch Prediction: Improving Microprocessor Control Flow Prediction for Operating Systems.
IEEE Trans. Computers, 2007
Microprocess. Microsystems, 2007
IET Comput. Digit. Tech., 2007
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007
Proceedings of the IEEE Workshop on Signal Processing Systems, 2007
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007
Impact of Process Variations on Carbon Nanotube Bundle Interconnect for Future FPGA Architectures.
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007
A novel dimensionally-decomposed router for on-chip communication in 3D architectures.
Proceedings of the 34th International Symposium on Computer Architecture (ISCA 2007), 2007
Proceedings of the 25th International Conference on Computer Design, 2007
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007
Proceedings of the 15th Annual IEEE Symposium on High-Performance Interconnects, 2007
Proceedings of the FPL 2007, 2007
A Unified Streaming Architecture for Real Time Face Detection and Gender Classification.
Proceedings of the FPL 2007, 2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
2006
IEEE Trans. Signal Process., 2006
ACM Trans. Embed. Comput. Syst., 2006
An efficient architecture for motion estimation and compensation in the transform domain.
IEEE Trans. Circuits Syst. Video Technol., 2006
Inverse discrete cosine transform architecture exploiting sparseness and symmetry properties.
IEEE Trans. Circuits Syst. Video Technol., 2006
Int. J. Distributed Sens. Networks, 2006
A Hybrid SoC Interconnect with Dynamic TDMA-Based Transaction-Less Buses and On-Chip Networks.
Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006
Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006
Performance Improvements through Timing Driven Reconfiguration of Black-Boxes in Platform FPGAs.
Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006
Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006
Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006
A Distributed Multi-Point Network Interface for Low-Latency, Deadlock-Free On-Chip Interconnects.
Proceedings of the 1st International ICST Conference on Nano-Networks, 2006
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 2006
Proceedings of the 2006 ACM SIGPLAN/SIGBED Conference on Languages, 2006
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006
Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006
Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006
Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006
Proceedings of the 33rd International Symposium on Computer Architecture (ISCA 2006), 2006
A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks.
Proceedings of the 33rd International Symposium on Computer Architecture (ISCA 2006), 2006
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006
Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006
Proceedings of the 2006 International Conference on Dependable Systems and Networks (DSN 2006), 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Proceedings of the 43rd Design Automation Conference, 2006
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006
2005
IEEE Trans. Very Large Scale Integr. Syst., 2005
ACM Trans. Embed. Comput. Syst., 2005
ACM Trans. Embed. Comput. Syst., 2005
Power and Performance Analysis of Motion Estimation Based on Hardware and Software Realizations.
IEEE Trans. Computers, 2005
IEEE Trans. Computers, 2005
J. Parallel Distributed Comput., 2005
Int. J. Embed. Syst., 2005
Int. J. Embed. Syst., 2005
IEEE Des. Test Comput., 2005
Adv. Comput., 2005
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005
Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005
Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005
Proceedings of the 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), 2005
Proceedings of the 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), 2005
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005
Online Detection and Diagnosis of Multiple Configuration Upsets in LUTs of SRAM-Based FPGAs.
Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005
Efficient methodology for detection and correction of SEU-based interconnect errors in FPGAs using partial reconfiguration (abstract only).
Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, 2005
Power Attack Resistant Cryptosystem Design: A Dynamic Voltage and Frequency Switching Approach.
Proceedings of the 2005 Design, 2005
Proceedings of the 2005 Design, 2005
Proceedings of the 2005 Design, 2005
Proceedings of the 2005 Design, 2005
Proceedings of the 2005 Design, 2005
Proceedings of the 42nd Design Automation Conference, 2005
Proceedings of the 42nd Design Automation Conference, 2005
Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
Design and analysis of an NoC architecture from performance, reliability and energy perspective.
Proceedings of the 2005 ACM/IEEE Symposium on Architecture for Networking and Communications Systems, 2005
2004
Data Organization and Retrieval on Parallel Air Channels: Performance and Energy Issues.
Wirel. Networks, 2004
IEEE Trans. Very Large Scale Integr. Syst., 2004
Studying Energy Trade Offs in Offloading Computation/Compilation in Java-Enabled Mobile Devices.
IEEE Trans. Parallel Distributed Syst., 2004
A compiler-based approach for dynamically managing scratch-pad memories in embedded systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004
ACM Trans. Archit. Code Optim., 2004
Des. Autom. Embed. Syst., 2004
Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004
Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004
Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004
Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004
Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004
Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004
Proceedings of the 2004 ACM SIGPLAN/SIGBED Conference on Languages, 2004
Proceedings of the 4th International Symposium on Memory Management, 2004
Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004
Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004
Proceedings of the 5th International Symposium on Quality of Electronic Design (ISQED 2004), 2004
Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004
Search speed and power driven integrated software and hardware optimizations for motion estimation algorithms.
Proceedings of the 2004 IEEE International Conference on Multimedia and Expo, 2004
Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004
Efficient VLSI implementation of inverse discrete cosine transform [image coding applications].
Proceedings of the 2004 IEEE International Conference on Acoustics, 2004
Proceedings of the 10th International Conference on High-Performance Computer Architecture (HPCA-10 2004), 2004
Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004
Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, 2004
Proceedings of the Field Programmable Logic and Application, 2004
Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, 2004
Proceedings of the 2004 Design, 2004
Proceedings of the 2004 Design, 2004
Proceedings of the 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2004
Proceedings of the Ultra Low-Power Electronics and Design, 2004
2003
ACM Trans. Embed. Comput. Syst., 2003
Evaluating Integrated Hardware-Software Optimizations Using a Unified Energy Estimation Framework.
IEEE Trans. Computers, 2003
Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003
Energy Efficient and Reliable System Design.
Proceedings of the IFIP VLSI-SoC 2003, 2003
Proceedings of the VLSI-SOC: From Systems to Chips, 2003
Proceedings of the 2003 ACM SIGPLAN Conference on Object-Oriented Programming Systems, 2003
Proceedings of the 2003 International Conference on Microelectronics Systems Education, 2003
Proceedings of the 2003 Conference on Languages, 2003
Proceedings of the 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), 2003
Interplay of energy and performance for disk arrays running transaction processing workloads.
Proceedings of the 2003 IEEE International Symposium on Performance Analysis of Systems and Software, 2003
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003
Exploiting program hotspots and code sequentiality for instruction cache leakage management.
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003
Energy and Performance Considerations in Work Partitioning for Mobile Spatial Queries.
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003
Computation and transmission energy modeling through profiling for MPEG4 video transmission.
Proceedings of the 2003 IEEE International Conference on Multimedia and Expo, 2003
Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003
CCC: Crossbar Connected Caches for Reducing Energy Consumption of On-Chip Multiprocessors.
Proceedings of the 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), 2003
Proceedings of the 2003 Design, 2003
Proceedings of the 40th Design Automation Conference, 2003
Proceedings of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2003
Proceedings of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2003
2002
VLDB J., 2002
A clock power model to evaluate impact of architectural and technology optimizations.
IEEE Trans. Very Large Scale Integr. Syst., 2002
Tuning garbage collection for reducing memory system energy in an embedded java environment.
ACM Trans. Embed. Comput. Syst., 2002
J. Circuits Syst. Comput., 2002
Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), 2002
Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), 2002
Proceedings of the 35th Annual International Symposium on Microarchitecture, 2002
Proceedings of the 2002 Joint Conference on Languages, 2002
Proceedings of the 2002 Joint Conference on Languages, 2002
Proceedings of the 2nd Java Virtual Machine Research and Technology Symposium, 2002
Proceedings of the 2002 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2002), 2002
Proceedings of the 2002 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2002), 2002
Proceedings of the 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 2002
Proceedings of the 20th International Conference on Computer Design (ICCD 2002), 2002
Power efficient adaptive M-QAM design using adaptive pipelined analog-to-digital converter.
Proceedings of the IEEE International Conference on Acoustics, 2002
Using Complete Machine Simulation for Software Power Estimation: The SoftWatt Approach.
Proceedings of the Eighth International Symposium on High-Performance Computer Architecture (HPCA'02), 2002
Proceedings of the Eighth International Symposium on High-Performance Computer Architecture (HPCA'02), 2002
Proceedings of the 2002 Design, 2002
Proceedings of the 2002 Design, 2002
Proceedings of the 39th Design Automation Conference, 2002
Proceedings of the Tenth International Symposium on Hardware/Software Codesign, 2002
Proceedings of the 10th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-X), 2002
Proceedings of the 2002 International Conference on Parallel Architectures and Compilation Techniques (PACT 2002), 2002
2001
Investigating Memory System Energy Behavior Using Software and Hardware Optimizations.
VLSI Design, 2001
IEEE Trans. Very Large Scale Integr. Syst., 2001
IEEE Trans. Very Large Scale Integr. Syst., 2001
IEEE Trans. Computers, 2001
IEEE Trans. Computers, 2001
Formulation and Validation of an Energy Dissipation Model for the Clock Generation Circuitry and Distribution Networks.
Proceedings of the 14th International Conference on VLSI Design (VLSI Design 2001), 2001
Proceedings of the VLDB 2001, 2001
Proceedings of the 2001 ACM SIGPLAN Workshop on Optimization of Middleware and Distributed Systems, 2001
Proceedings of the 2001 ACM SIGPLAN-SIGSOFT Workshop on Program Analysis For Software Tools and Engineering, 2001
Proceedings of the 2001 International Conference on Microelectronics Systems Education, 2001
Proceedings of the 34th Annual International Symposium on Microarchitecture, 2001
Proceedings of the 1st Java Virtual Machine Research and Technology Symposium, 2001
Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001
Proceedings of the 15th International Parallel & Distributed Processing Symposium (IPDPS-01), 2001
Proceedings of the 19th International Conference on Computer Design (ICCD 2001), 2001
Proceedings of the 19th International Conference on Computer Design (ICCD 2001), 2001
Proceedings of the Seventh International Symposium on High-Performance Computer Architecture (HPCA'01), 2001
Proceedings of the 38th Design Automation Conference, 2001
Proceedings of the 2001 International Conference on Compilers, 2001
2000
Proceedings of the Integrated Circuit Design, 2000
Proceedings of the Languages and Compilers for Parallel Computing, 2000
Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000
Proceedings of the 27th International Symposium on Computer Architecture (ISCA 2000), 2000
Proceedings of the 14th international conference on Supercomputing, 2000
Proceedings of the Sixth International Symposium on High-Performance Computer Architecture, 2000
Proceedings of the High Performance Computing, 2000
Proceedings of the High Performance Computing, 2000
Proceedings of the 10th ACM Great Lakes Symposium on VLSI 2000, 2000
Proceedings of the 37th Conference on Design Automation, 2000
Proceedings of the 2000 International Conference on Compilers, 2000
1999
Energy Efficient Datapath Synthesis Using Dynamic Frequency Clocking and Multiple Voltages.
Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999
Proceedings of the 5th USENIX Conference on Object-Oriented Technologies & Systems, 1999
1998
A linear array processor with dynamic frequency clocking for image processing applications.
IEEE Trans. Circuits Syst. Video Technol., 1998
Proceedings of the ECOOP'98, 1998
1996
Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996
Proceedings of the 13th International Conference on Pattern Recognition, 1996
Proceedings of the Proceedings 1996 International Conference on Image Processing, 1996
Proceedings of the 1996 International Conference on Computer Design (ICCD '96), 1996