Narasinga Rao Miniskar
Orcid: 0000-0001-8259-8891
According to our database1,
Narasinga Rao Miniskar
authored at least 36 papers
between 2009 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
MatRIS: Addressing the Challenges for Portability and Heterogeneity Using Tasking for Matrix Decomposition (Cholesky).
Proceedings of the Asynchronous Many-Task Systems and Applications, 2024
IRIS Reimagined: Advancements in Intelligent Runtime System for Task-Based Programming.
Proceedings of the Asynchronous Many-Task Systems and Applications, 2024
IRIS-GNN: Leveraging Graph Neural Networks for Scheduling on Truly Heterogeneous Runtime Systems.
Proceedings of the SC24-W: Workshops of the International Conference for High Performance Computing, 2024
Proceedings of the IEEE Military Communications Conference, 2024
IRIS: Exploring Performance Scaling of the Intelligent Runtime System and its Dynamic Scheduling Policies.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2024
Neuro-Spark: A Submicrosecond Spiking Neural Networks Architecture for In-Sensor Filtering.
Proceedings of the International Conference on Neuromorphic Systems, 2024
CHARM-SYCL & IRIS: A Tool Chain for Performance Portability on Extremely Heterogeneous Systems.
Proceedings of the 20th IEEE International Conference on e-Science, 2024
2023
Abisko: Deep codesign of an architecture for spiking neural networks using novel neuromorphic materials.
Int. J. High Perform. Comput. Appl., July, 2023
MatRIS: Multi-level Math Library Abstraction for Heterogeneity and Performance Portability using IRIS Runtime.
Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, 2023
Proceedings of the 2nd International Workshop on Extreme Heterogeneity Solutions, 2023
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Proceedings of the IEEE International Conference on Rebooting Computing, 2023
On-Sensor Data Filtering using Neuromorphic Computing for High Energy Physics Experiments.
Proceedings of the 2023 International Conference on Neuromorphic Systems, 2023
Proceedings of the IEEE High Performance Extreme Computing Conference, 2023
2022
Adrastea: An Efficient FPGA Design Environment for Heterogeneous Scientific Computing and Machine Learning.
Proceedings of the Accelerating Science and Engineering Discoveries Through Integrated Research Infrastructure for Experiment, Big Data, Modeling and Simulation, 2022
LaRIS: Targeting Portability and Productivity for LAPACK Codes on Extreme Heterogeneous Systems by Using IRIS.
Proceedings of the IEEE/ACM Redefining Scalability for Diversely Heterogeneous Architectures Workshop, 2022
Proceedings of the 29th IEEE International Conference on High Performance Computing, 2022
Proceedings of the 32nd International Conference on Field-Programmable Logic and Applications, 2022
2021
Proceedings of the High Performance Computing - 36th International Conference, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Toward Performance Portable Programming for Heterogeneous Systems on a Chip: A Case Study with Qualcomm Snapdragon SoC.
Proceedings of the 2021 IEEE High Performance Extreme Computing Conference, 2021
2020
Deffe: a data-efficient framework for performance characterization in domain-specific computing.
Proceedings of the 17th ACM International Conference on Computing Frontiers, 2020
2019
Low Complex & High Accuracy Computation Approximations to Enable On-Device RNN Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
2018
Optimal SDRAM Buffer Allocator for Efficient Reuse of Layer IO in CNNs Inference Framework.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the 2018 IEEE International Conference on Image Processing, 2018
Proceedings of the 2018 IEEE International Conference on Image Processing, 2018
2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
A novel method to regenerate an optimal CNN by exploiting redundancy patterns in the network.
Proceedings of the 2017 IEEE International Conference on Image Processing, 2017
2016
Intra mode power saving methodology for CGRA-based reconfigurable processor architectures.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
2014
Retargetable automatic generation of compound instructions for CGRA based reconfigurable processor applications.
Proceedings of the 2014 International Conference on Compilers, 2014
2012
System Scenario Based Resource Management of Processing Elements on MPSoC (Systeemscenario-gebaseerd beheer van taken op multiprocessor systemen-op-chip (MPSoC)).
PhD thesis, 2012
Proceedings of the 25th Symposium on Integrated Circuits and Systems Design, 2012
Function inlining and loop unrolling for loop acceleration in reconfigurable processors.
Proceedings of the 15th International Conference on Compilers, 2012
2011
Proceedings of the 2011 International Symposium on System on Chip, 2011
2010
Proceedings of the 16th IEEE International Conference on Parallel and Distributed Systems, 2010
2009
Proceedings of the Embedded Computer Systems: Architectures, 2009