Narain D. Arora

According to our database, Narain D. Arora authored at least 4 papers between 1993 and 2007.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2007

On-Chip Inductance in X Architecture Enabled Design.

Santosh Shah, Arani Sinha, Li Song, Narain D. Arora

Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

MOSFET Modeling for VLSI Simulation - Theory and Practice

Narain D. Arora

International Series on Advances in Solid State Electronics and Technology, World Scientific, ISBN: 978-981-4365-49-9, 2007

1996

Modeling and extraction of interconnect capacitances for multilayer VLSI circuits.

Narain D. Arora, Kartik V. Raol, Reinhard Schumann, Llanda M. Richardson

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996

1993

OPTIMA: A nonlinear model parameter extraction program with statistical confidence region algorithms.

Mahesh S. Sharma, Narain D. Arora

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993