Naoto Miyamoto

According to our database1, Naoto Miyamoto authored at least 25 papers between 2001 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Cross-Country Ski Skating Style Sub-Technique Detection and Skiing Characteristic Analysis on Snow Using High-Precision GNSS.
Sensors, September, 2024

2023
Estimation of articulated angle in six-wheeled dump trucks using multiple GNSS receivers for autonomous driving.
CoRR, 2023

2022
Path Planning of the Turning Back of an Autonomous Large-Scale Six-Wheeled Dump Truck for Loading/Leaving Sediment Based on Backhoe Work.
Proceedings of the IEEE/SICE International Symposium on System Integration, 2022

Loading an Autonomous Large-Scale Dump Truck: Path Planning Based on Motion Data from Human-Operated Construction Vehicles.
Proceedings of the IEEE/RSJ International Conference on Intelligent Robots and Systems, 2022

2021
Semantic Mapping of Construction Site From Multiple Daily Airborne LiDAR Data.
IEEE Robotics Autom. Lett., 2021

An individual prediction model of the pre-loading motion for operator and backhoe pairs.
Adv. Robotics, 2021

Estimation of articulated angle in six-wheeled dump trucks using multiple GNSS receivers for autonomous driving.
Adv. Robotics, 2021

2020
Attachable Sensor Boxes to Visualize Backhoe Motion.
Proceedings of the 2020 IEEE/SICE International Symposium on System Integration, 2020

Prediction of Backhoe Loading Motion via the Beta-Process Hidden Markov Model.
Proceedings of the IEEE/RSJ International Conference on Intelligent Robots and Systems, 2020

2019
Cross-Country Skiing Analysis and Ski Technique Detection by High-Precision Kinematic Global Navigation Satellite System.
Sensors, 2019

Autonomous Driving of Six-Wheeled Dump Truck with a Retrofitted Robot.
Proceedings of the Field and Service Robotics, 2019

2010
Temporal circuit partitioning for a 90nm CMOS multi-context FPGA and its delay measurement.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

A WiMAX turbo decoder with tailbiting BIP architecture.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

Development of a CAD tool for 3D-FPGAs.
Proceedings of the IEEE International Conference on 3D System Integration, 2010

2008
Delay evaluation of 90nm CMOS multi-context FPGA with shift-register-type temporal communication module for large-scale circuit emulation.
Proceedings of the 2008 International Conference on Field-Programmable Technology, 2008

2007
A Rapid Prototyping of Real-Time Pattern Generator for Step-and-Scan Lithography Using Digital Micromirror Device.
Proceedings of the 2007 International Conference on Field-Programmable Technology, 2007

A Balanced Vector-Quantization Processor Eliminating Redundant Calculation for Real-Time Motion Picture Compression.
Proceedings of the 2007 International Conference on Field-Programmable Technology, 2007

Improving Execution Speed of FPGA using Dynamically Reconfigurable Technique.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

2005
A 3.7×3.7mm<sup>2</sup> 310.9mW 105.2msec 512×512-Pixel Phase-Only Correlation Processor.
J. Robotics Mechatronics, 2005

2004
A Dynamically-Reconfigurable Image Recognition Processor.
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

An approach to realize time-sharing of flip-flops in time-multiplexed FPGAs.
Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, 2004

An image recognition processor using dynamically reconfigurable ALU.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

The flexible processor an approach for single-chip hardware emulation by dynamic reconfiguration.
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

A small-area high-performance 512-point 2-dimensional FFT single-chip processor.
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

2001
Flexible processor based on full-adder/ d-flip-flop merged module.
Proceedings of ASP-DAC 2001, 2001


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