Naoko Misawa

Orcid: 0000-0001-9362-803X

According to our database1, Naoko Misawa authored at least 12 papers between 2021 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

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Bibliography

2024
Comprehensive Analysis of Read Fluctuations in ReRAM CiM by Using Fluctuation Pattern Classifier.
IEICE Trans. Electron., 2024

REM-CiM: Attentional RGB-Event Fusion Multi-Modal Analog CiM for Area/Energy-Efficient Edge Object Detection during Both Day and Night.
IEICE Trans. Electron., 2024

Embedded Transformer Hetero-CiM: SRAM CiM for 4b Read/Write-MAC Self-attention and MLC ReRAM CiM for 6b Read-MAC Linear&FC Layers.
Proceedings of the IEEE International Memory Workshop, 2024

2023
Write Variation & Reliability Error Compensation by Layer-Wise Tunable Retraining of Edge FeFET LM-GA CiM.
IEICE Trans. Electron., July, 2023

ReRAM CiM Fluctuation Pattern Classification by CNN Trained on Artificially Created Dataset.
Proceedings of the IEEE International Reliability Physics Symposium, 2023

Stochastic Computing-based Computation-in-Memory (SC CiM) Architecture for DNNs and Hierarchical Evaluations of Non-volatile Memory Error and Defect Tolerance.
Proceedings of the IEEE International Memory Workshop, 2023

LIORAT: NN Layer I/O Range Training for Area/Energy-Efficient Low-Bit A/D Conversion System Design in Error-Tolerant Computation-in-Memory.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

2022
Antithetic effect of interferon-α on cell-free and cell-to-cell HIV-1 infection.
PLoS Comput. Biol., 2022

Edge Computation-in-Memory for In-situ Class-incremental Learning with Knowledge Distillation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Domain Specific ReRAM Computation-in-Memory Design Considering Bit Precision and Memory Errors for Simulated Annealing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Edge Retraining of FeFET LM-GA CiM for Write Variation & Reliability Error Compensation.
Proceedings of the IEEE International Memory Workshop, 2022

2021
Simulated Annealing Algorithm & ReRAM Device Co-optimization for Computation-in-Memory.
Proceedings of the IEEE International Memory Workshop, 2021


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