Naoko Itoga

According to our database, Naoko Itoga authored at least 3 papers between 2005 and 2008.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2008

An 833MHz Pseudo-Two-Port Embedded DRAM for Graphics Applications.

Mariko Kaku, Hitoshi Iwai, Takeshi Nagai, Masaharu Wada, Atsushi Suzuki, Tomohisa Takai, Naoko Itoga, Takayuki Miyazaki, Takayuki Iwai, Hiroyuki Takenaka, Takehiko Hojo, Shinji Miyano, Nobuaki Otsuka

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2006

A 65nm low-power embedded DRAM with extended data-retention sleep mode.

Takeshi Nagai, Masaharu Wada, Hitoshi Iwai, Mariko Kaku, Atsushi Suzuki, Tomohisa Takai, Naoko Itoga, Takayuki Miyazaki, Hiroyuki Takenaka, Takehiko Hojo, Shinji Miyano

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2005

Cantilever Type Probe Card for At-Speed Memory Test on Wafer.

Hitoshi Iwai, Atsushi Nakayama, Naoko Itoga, Kotaro Omata

Proceedings of the 23rd IEEE VLSI Test Symposium (VTS 2005), 2005