Naoki Kitai
According to our database1,
Naoki Kitai
authored at least 8 papers
between 1999 and 2007.
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Bibliography
2007
A 512kB Embedded Phase Change Memory with 416kB/s Write Throughput at 100μA Cell Write Current.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
2005
A low-power four-transistor SRAM cell with a stacked vertical poly-silicon PMOS and a dual-word-voltage scheme.
IEEE J. Solid State Circuits, 2005
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005
2004
Analysis of SRAM neutron-induced errors based on the consideration of both charge-collection and parasitic-bipolar failure modes.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004
1999
IEEE Trans. Consumer Electron., 1999
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999