Nanditha Rao

According to our database1, Nanditha Rao authored at least 8 papers between 2019 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond.
CoRR, 2024

Hybrid Multi-tile Vector Systolic Architecture for Accelerating Convolution on FPGAs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

FPGA-based Hardware Software Co-design to Accelerate Brain Tumour Segmentation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

VPU-CIM: A 130nm, 33.98 TOPS/W RRAM based Compute-In-Memory Vector Co-Processor.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023
DSEAdd: FPGA based Design Space Exploration for Approximate Adders with Variable Bit-precision.
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

Architectural Exploration of Heterogeneous FPGAs for Performance Enhancement of ML Benchmarks.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2023

2022
The Characterization of Errors in an FPGA-Based RISC-V Processor due to Single Event Transients.
Microelectron. J., 2022

2019
Analysis of the Effect of QoS on Video Conferencing QoE.
Proceedings of the 15th International Wireless Communications & Mobile Computing Conference, 2019


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