Nandeesha Veeranna

According to our database, Nandeesha Veeranna authored at least 8 papers between 2016 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

Source Code Obfuscation of Behavioral IPs: Challenges and Solutions.

Nandeesha Veeranna, Benjamin Carrion Schafer

Behavioral Synthesis for Hardware Security, 2022

2018

CIDPro: Custom Instructions for Dynamic Program Diversification.

Thinh Hung Pham, Alexander Fell, Arnab Kumar Biswas, Siew-Kei Lam, Nandeesha Veeranna

Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

2017

Hardware Trojan Detection in Behavioral Intellectual Properties (IP's) Using Property Checking Techniques.

Nandeesha Veeranna, Benjamin Carrión Schäfer

IEEE Trans. Emerg. Top. Comput., 2017

S3CBench: Synthesizable Security SystemC Benchmarks for High-Level Synthesis.

Nandeesha Veeranna, Benjamin Carrión Schäfer

J. Hardw. Syst. Secur., 2017

Trust Filter: Runtime Hardware Trojan Detection in Behavioral MPSoCs.

Nandeesha Veeranna, Benjamin Carrión Schäfer

J. Hardw. Syst. Secur., 2017

Efficient behavioral intellectual properties source code obfuscation for high-level synthesis.

Nandeesha Veeranna, Benjamin Carrión Schäfer

Proceedings of the 18th IEEE Latin American Test Symposium, 2017

2016

On Time Redundancy of Fault Tolerant C-Based MPSoCs.

Anjana Balachandran, Nandeesha Veeranna, Benjamin Carrión Schäfer

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

Hardware Trojan avoidance and detection for dynamically re-configurable FPGAs.

Nandeesha Veeranna, Benjamin Carrión Schäfer

Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016