Nanbing Pan
According to our database1,
Nanbing Pan
authored at least 4 papers
between 2022 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
2022
2023
2024
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Bibliography
2024
OASIS: A 28-nm 32-kb SRAM-Based Computing-in-Memory Design With Output Activation Sparsity Support.
IEEE Trans. Circuits Syst. II Express Briefs, April, 2024
2022
A 65 nm 73 kb SRAM-Based Computing-In-Memory Macro With Dynamic-Sparsity Controlling.
IEEE Trans. Circuits Syst. II Express Briefs, 2022
A Computing-in-Memory SRAM Macro Based on Fully-Capacitive-Coupling With Hierarchical Capacity Attenuator for 4-b MAC Operation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022