Nan Sun

According to our database, Nan Sun authored at least 154 papers between 2012 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

A 0.004-mm² 200-MS/s Pipelined SAR ADC With kT/C Noise Cancellation and Robust Ring-Amp.

Mingtao Zhan, Lu Jie, Xiyuan Tang, Yi Zhong, Nan Sun

IEEE J. Solid State Circuits, July, 2024

An Energy-Efficient Computing-in-Memory NN Processor With Set-Associate Blockwise Sparsity and Ping-Pong Weight Update.

Jinshan Yue, Yongpan Liu, Xiaoyu Feng, Yifan He, Jingyu Wang, Zhe Yuan, Mingtao Zhan, Jiaxin Liu, Jian-Wei Su, Yen-Lin Chung, Ping-Chun Wu, Li-Yang Hong, Meng-Fan Chang, Nan Sun, Chunmeng Dou, Xueqing Li, Ming Liu, Huazhong Yang

IEEE J. Solid State Circuits, May, 2024

Mitigating Sampling Noise for Energy-Efficient ADCs: A Tutorial Brief.

Chang Liu, Jiaxin Liu, Nan Sun

IEEE Trans. Circuits Syst. II Express Briefs, March, 2024

22.4 A 4.8GS/s 7-ENoB Time-Interleaved SAR ADC with Dither-Based Background Timing-Skew Calibration and Bit-Distribution-Based Background Ping-Pong Comparator Offset Calibration.

Yunsong Tao, Mingyang Gu, Baoyong Chi, Yi Zhong, Lu Jie, Nan Sun

Proceedings of the IEEE International Solid-State Circuits Conference, 2024

9.3 A 71dB SNDR 200MHz BW Interleaved Pipe-SAR ADC with a Shared Residue Integrating Amplifier Achieving 173dB FoMs.

Xiyu He, Mingyang Gu, Hanjun Jiang, Yi Zhong, Nan Sun, Lu Jie

Proceedings of the IEEE International Solid-State Circuits Conference, 2024

A Dithered-Digital-Mixing Background Timing-Skew Calibration Method for Time-Interleaved ADCs.

Yunsong Tao, Yi Zhong, Jin Shao, Changyou Men, Lu Jie, Nan Sun

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

A 16-bit 10-GS/s Calibration-Free DAC Achieving <-77dBc IM3 up to 4.95GHz in 28nm CMOS.

Chengyu Huang, Kezhuo Ma, Sihao Chen, Jiaxuan Fan, Nan Sun, Huazhong Yang, Xueqing Li

Proceedings of the IEEE Custom Integrated Circuits Conference, 2024

2023

A 10-mW 10-ENoB 1-GS/s Ring-Amp-Based Pipelined TI-SAR ADC With Split MDAC and Switched Reference Decoupling Capacitor.

Mingtao Zhan, Lu Jie, Yi Zhong, Nan Sun

IEEE J. Solid State Circuits, December, 2023

A 4-Bit Mixed-Signal MAC Macro With One-Shot ADC Conversion.

Xiangxing Yang, Nan Sun

IEEE J. Solid State Circuits, September, 2023

A Bandwidth-Adaptive Pipelined SAR ADC With Three-Stage Cascoded Floating Inverter Amplifier.

Xiyuan Tang, Xiangxing Yang, Jiaxin Liu, Zongnan Wang, Wei Shi, David Z. Pan, Nan Sun

IEEE J. Solid State Circuits, September, 2023

A 16-Bit 4.0-GS/s Calibration-Free 65 nm DAC Achieving >70 dBc SFDR and < -80 dBc IM3 Up to 1 GHz With Enhanced Constant-Switching-Activity Data-Weighted-Averaging.

Yushen Fu, Chengyu Huang, Longqiang Lai, Nan Sun, Xueqing Li, Huazhong Yang

IEEE Trans. Circuits Syst. I Regul. Pap., May, 2023

An In-Memory-Computing Charge-Domain Ternary CNN Classifier.

Xiangxing Yang, Keren Zhu, Xiyuan Tang, Meizhi Wang, Mingtao Zhan, Nanshu Lu, Jaydeep P. Kulkarni, David Z. Pan, Yongpan Liu, Nan Sun

IEEE J. Solid State Circuits, May, 2023

A Power-Efficient 13-Tap FIR Filter and an IIR Filter Embedded in a 10-Bit SAR ADC.

Xin Xin, Linxiao Shen, Xiyuan Tang, Yi Shen, Jueping Cai, Xingyuan Tong, Nan Sun

IEEE Trans. Circuits Syst. I Regul. Pap., 2023

A 5.6-89.9TOPS/W Heterogeneous Computing-in-Memory SoC with High-Utilization Producer-Consumer Architecture and High-Frequency Read-Free CIM Macro.

Jinshan Yue, Mingtao Zhan, Zi Wang, Yifan He, Yaolei Li, Songming Yu, Wenyu Sun, Lu Jie, Chunmeng Dou, Xueqing Li, Nan Sun, Huazhong Yang, Ming Liu, Yongpan Liu

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

A 26.4mW, 18.6MS/s Image Reconstruction Processor for IoT Compressive Sensing.

Yu-Cheng Lin, Chanmin Park, Wenda Zhao, Nan Sun, Youngcheol Chae, Chia-Hsiang Yang

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

A 10mW 10-ENOB 1GS/s Ring-Amp-Based Pipelined TI-SAR ADC with Split MDAC and Switched Reference Decoupling Capacitor.

Mingtao Zhan, Lu Jie, Nan Sun

Proceedings of the IEEE International Solid- State Circuits Conference, 2023

LeCA: In-Sensor Learned Compressive Acquisition for Efficient Machine Vision on the Edge.

Tianrui Ma, Adith Jagadish Boloor, Xiangxing Yang, Weidong Cao, Patrick Williams, Nan Sun, Ayan Chakrabarti, Xuan Zhang

Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

A 0.021mm² 92dB-SNDR 88kHz-BW Incremental Zoom ADC with 2^nd-order RT-DEM and Quiet Chopping.

Chaoyang Xing, Yi Zhong, Nan Sun, Lu Jie

Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

A 12b 1GS/s Pipelined ADC with Digital Background Calibration of Inter-stage Gain, Capacitor Mismatch, and Kick-back Errors.

Mingyang Gu, Yi Zhong, Lu Jie, Nan Sun

Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

A 3.7mW 11b 1GS/s Time-Interleaved SAR ADC with Robust One-Stage Correlation-Based Background Timing-Skew Calibration.

Mingyang Gu, Yunsong Tao, Xiyu He, Yi Zhong, Lu Jie, Nan Sun

Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

A Fully-Dynamic kT/C-Noise-Canceled SAR ADC with Trimming-Free Dynamic Amplifier.

Haoyu Zhuang, Nan Sun, Linzhi Tao, Yizhan Li, Oiang Li

Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

A 0.69-Noise-Efficiency-Factor 4 x-Current-Reuse Dynamic Comparator with A Stacking FIA.

Haoyu Zhuang, Nan Sun, Yirui Cao, Linzhi Tao, Qiang Li

Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

An 80.2-to-89.1dB-SNDR 24k-to-200kHz-BW VCO-Based Synthesized ?S ADC with 105dB SFDR in 28-nm CMOS.

Yi Zhong, Mingtao Zhan, Wei Wang, Xiyuan Tang, Lu Jie, Nan Sun

Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

A 1GS/s6-Core Programmable A/D Converter Array Supporting Architecture Restructuring and Multitasking.

Zhishuai Zhang, Zijie Gao, Siyu Huang, Nan Sun, Lu Jie

Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

2022

Low-Power SAR ADC Design: Overview and Survey of State-of-the-Art Techniques.

Xiyuan Tang, Jiaxin Liu, Yi Shen, Shaolan Li, Linxiao Shen, Arindam Sanyal, Kareem Ragab, Nan Sun

IEEE Trans. Circuits Syst. I Regul. Pap., 2022

A 10-bit 100-MS/s SAR ADC With Always-On Reference Ripple Cancellation.

Yi Shen, Xiyuan Tang, Xin Xin, Shubin Liu, Zhangming Zhu, Nan Sun

IEEE Trans. Circuits Syst. I Regul. Pap., 2022

An Efficient Analog Circuit Sizing Method Based on Machine Learning Assisted Global Optimization.

Ahmet Faruk Budak, Miguel Gandara, Wei Shi, David Z. Pan, Nan Sun, Bo Liu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

RobustAnalog: Fast Variation-Aware Analog Circuit Design Via Multi-task RL.

Wei Shi, Hanrui Wang, Jiaqi Gu, Mingjie Liu, David Z. Pan, Song Han, Nan Sun

Proceedings of the 2022 ACM/IEEE Workshop on Machine Learning for CAD, 2022

A 0.004mm² 200MS/S Pipelined SAR ADC with kT/C Noise Cancellation and Robust Ring-Amp.

Mingtao Zhan, Lu Jie, Xiyuan Tang, Nan Sun

Proceedings of the IEEE International Solid-State Circuits Conference, 2022

A 0.014mm² 10kHz-BW Zoom-Incremental-Counting ADC Achieving 103dB SNDR and 100dB Full-Scale CMRR.

Lu Jie, Mingtao Zhan, Xiyuan Tang, Nan Sun

Proceedings of the IEEE International Solid-State Circuits Conference, 2022

A Second-Order VCO-Based ΔΣ ADC with Fully Digital Feedback Summation.

Chaoyang Xing, Yi Zhong, Jin Shao, Pengpeng Chen, Lu Jie, Nan Sun

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

A Fast Converging Correlation-Based Background Timing Skew Calibration Technique by Digital Windowing for Time-Interleaved ADCs.

Yunsong Tao, Kareem Ragab, Jin Shao, Pengpeng Chen, Yi Zhong, Lu Jie, Nan Sun

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

A 0.37mm² 250kHz-BW 95dB-SNDR CTDSM with Low-Cost 2^nd-order Vector-Quantizer DEM.

Wei Shi, Xing Wang, Xiyuan Tang, Abhishek Mukherjee, Raviteja Theertham, Shanthi Pavan, Lu Jie, Nan Sun

Proceedings of the IEEE Custom Integrated Circuits Conference, 2022

Generative-Adversarial-Network-Guided Well-Aware Placement for Analog Circuits.

Keren Zhu, Hao Chen, Mingjie Liu, Xiyuan Tang, Wei Shi, Nan Sun, David Z. Pan

Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

2021

High-Precision ADC Testing With Relaxed Reference Voltage Stationarity.

Vivek Varier, Nan Sun

IEEE Trans. Instrum. Meas., 2021

A 3-Phase Resonant Switched-Capacitor Converter for Data Center 48-V Rack Power Distribution.

Chuang Wang, Yan Lu, Nan Sun, Rui Paulo Martins

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Portable CMOS NMR System With 50-kHz IF, 10-μs Dead Time, and Frequency Tracking.

Sungjin Hong, Nan Sun

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

A Fully Dynamic Low-Power Wideband Time-Interleaved Noise-Shaping SAR ADC.

Haoyu Zhuang, Jiaxin Liu, He Tang, Xizhu Peng, Nan Sun

IEEE J. Solid State Circuits, 2021

A 51-pJ/Pixel 33.7-dB PSNR 4× Compressive CMOS Image Sensor With Column-Parallel Single-Shot Compressive Sensing.

Chanmin Park, Wenda Zhao, Injun Park, Nan Sun, Youngcheol Chae

IEEE J. Solid State Circuits, 2021

A 74.5-dB Dynamic Range 10-MHz BW CT-ΔΣ ADC With Distributed-Input VCO and Embedded Capacitive-π Network in 40-nm CMOS.

Abhishek Mukherjee, Miguel Gandara, Xiangxing Yang, Linxiao Shen, Xiyuan Tang, Chen-Kai Hsu, Nan Sun

IEEE J. Solid State Circuits, 2021

A 90-dB-SNDR Calibration-Free Fully Passive Noise-Shaping SAR ADC With 4× Passive Gain and Second-Order DAC Mismatch Error Shaping.

Jiaxin Liu, Xing Wang, Zijie Gao, Mingtao Zhan, Xiyuan Tang, Chen-Kai Hsu, Nan Sun

IEEE J. Solid State Circuits, 2021

A 77.1-dB-SNDR 6.25-MHz-BW Pipeline SAR ADC With Enhanced Interstage Gain Error Shaping and Quantization Noise Shaping.

Chen-Kai Hsu, Xiyuan Tang, Jiaxin Liu, Rui Xu, Wenda Zhao, Abhishek Mukherjee, Timothy R. Andeen, Nan Sun

IEEE J. Solid State Circuits, 2021

MAGICAL: An Open- Source Fully Automated Analog IC Layout System from Netlist to GDSII.

Hao Chen, Mingjie Liu, Biying Xu, Keren Zhu, Xiyuan Tang, Shaolan Li, Yibo Lin, Nan Sun, David Z. Pan

IEEE Des. Test, 2021

A 2.75-to-75.9TOPS/W Computing-in-Memory NN Processor Supporting Set-Associate Block-Wise Zero Skipping and Ping-Pong CIM with Simultaneous Computation and Weight Updating.

Jinshan Yue, Xiaoyu Feng, Yifan He, Yuxuan Huang, Yipeng Wang, Zhe Yuan, Mingtao Zhan, Jiaxin Liu, Jian-Wei Su, Yen-Lin Chung, Ping-Chun Wu, Li-Yang Hung, Meng-Fan Chang, Nan Sun, Xueqing Li, Huazhong Yang, Yongpan Liu

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

A 0.4-to-40MS/s 75.7dB-SNDR Fully Dynamic Event-Driven Pipelined ADC with 3-Stage Cascoded Floating Inverter Amplifier.

Xiyuan Tang, Xiangxing Yang, Jiaxin Liu, Wei Shi, David Z. Pan, Nan Sun

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

10.4 A 3.7mW 12.5MHz 81dB-SNDR 4th-Order CTDSM with Single-OTA and 2nd-Order NS-SAR.

Wei Shi, Jiaxin Liu, Abhishek Mukherjee, Xiangxing Yang, Xiyuan Tang, Linxiao Shen, Wenda Zhao, Nan Sun

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

A 79dB-SNDR 167dB-FoM Bandpass ΔΣ ADC Combining N-Path Filter with Noise-Shaping SAR.

Linxiao Shen, Zijie Gao, Xiangxing Yang, Wei Shi, Nan Sun

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

27.1 A 250kHz-BW 93dB-SNDR 4^th-Order Noise-Shaping SAR Using Capacitor Stacking and Dynamic Buffering.

Jiaxin Liu, Dengquan Li, Yi Zhong, Xiyuan Tang, Nan Sun

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

OpenSAR: An Open Source Automated End-to-end SAR ADC Compiler.

Mingjie Liu, Xiyuan Tang, Keren Zhu, Hao Chen, Nan Sun, David Z. Pan

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

A 16-Bit 4.0-GS/s Calibration-Free 65nm DAC with >70dBc SFDR and <-80dBc IM3 up to 1GHz Using Constant-Activity Element Switching.

Chengyu Huang, Yushen Fu, Zekun Yang, Yang Liu, Nan Sun, Xueqing Li, Huazhong Yang

Proceedings of the 47th ESSCIRC 2021, 2021

Universal Symmetry Constraint Extraction for Analog and Mixed-Signal Circuits with Graph Neural Networks.

Hao Chen, Keren Zhu, Mingjie Liu, Xiyuan Tang, Nan Sun, David Z. Pan

Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

DNN-Opt: An RL Inspired Optimization for Analog Circuit Sizing using Deep Neural Networks.

Ahmet Faruk Budak, Prateek Bhansali, Bo Liu, Nan Sun, David Z. Pan, Chandramouli V. Kashyap

Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

An 81.5dB-DR 1.25MHz-BW VCO-Based CT ΔΣ ADC with Double-PFD Quantizer.

Yi Zhong, Xiyuan Tang, Jiaxin Liu, Wenda Zhao, Shaolan Li, Nan Sun

Proceedings of the IEEE Custom Integrated Circuits Conference, 2021

MAGICAL 1.0: An Open-Source Fully-Automated AMS Layout Synthesis Framework Verified With a 40-nm 1GS/s Δ∑ ADC.

Hao Chen, Mingjie Liu, Xiyuan Tang, Keren Zhu, Abhishek Mukherjee, Nan Sun, David Z. Pan

Proceedings of the IEEE Custom Integrated Circuits Conference, 2021

2020

A Strong Subthreshold Current Array PUF Resilient to Machine Learning Attacks.

Haoyu Zhuang, Xiaodan Xi, Nan Sun, Michael Orshansky

IEEE Trans. Circuits Syst. I Regul. Pap., 2020

A Second-Order Purely VCO-Based CT ΔΣ ADC Using a Modified DPLL Structure in 40-nm CMOS.

Yi Zhong, Shaolan Li, Xiyuan Tang, Linxiao Shen, Wenda Zhao, Siliang Wu, Nan Sun

IEEE J. Solid State Circuits, 2020

A 0.025-mm² 0.8-V 78.5-dB SNDR VCO-Based Sensor Readout Circuit in a Hybrid PLL- ΔΣ M Structure.

Wenda Zhao, Shaolan Li, Biying Xu, Xiangxing Yang, Xiyuan Tang, Linxiao Shen, Nanshu Lu, David Z. Pan, Nan Sun

IEEE J. Solid State Circuits, 2020

A Fractional-<i>N</i> PLL With Space-Time Averaging for Quantization Noise Reduction.

Yanlong Zhang, Arindam Sanyal, Xueyi Yu, Xing Quan, Kailin Wen, Xiyuan Tang, Gang Jin, Li Geng, Nan Sun

IEEE J. Solid State Circuits, 2020

A 13.5-ENOB, 107-μW Noise-Shaping SAR ADC With PVT-Robust Closed-Loop Dynamic Amplifier.

Xiyuan Tang, Xiangxing Yang, Wenda Zhao, Chen-Kai Hsu, Jiaxin Liu, Linxiao Shen, Abhishek Mukherjee, Wei Shi, Shaolan Li, David Z. Pan, Nan Sun

IEEE J. Solid State Circuits, 2020

An Energy-Efficient Comparator With Dynamic Floating Inverter Amplifier.

Xiyuan Tang, Linxiao Shen, Begum Kasap, Xiangxing Yang, Wei Shi, Abhishek Mukherjee, David Z. Pan, Nan Sun

IEEE J. Solid State Circuits, 2020

An Energy-Efficient Time-Domain Incremental Zoom Capacitance-to-Digital Converter.

Xiyuan Tang, Shaolan Li, Xiangxing Yang, Linxiao Shen, Wenda Zhao, Randall P. Williams, Jiaxin Liu, Zhichao Tan, Neal A. Hall, David Z. Pan, Nan Sun

IEEE J. Solid State Circuits, 2020

Guest Editorial 2019 Custom Integrated Circuits Conference.

Nan Sun, Qun Jane Gu

IEEE J. Solid State Circuits, 2020

A 10-bit 120-MS/s SAR ADC With Reference Ripple Cancellation Technique.

Yi Shen, Xiyuan Tang, Linxiao Shen, Wenda Zhao, Xin Xin, Shubin Liu, Zhangming Zhu, Visvesh Sathe, Nan Sun

IEEE J. Solid State Circuits, 2020

A 13-bit 0.005-mm² 40-MS/s SAR ADC With kT/C Noise Cancellation.

Jiaxin Liu, Xiyuan Tang, Wenda Zhao, Linxiao Shen, Nan Sun

IEEE J. Solid State Circuits, 2020

A 7-bit 900-MS/s 2-Then-3-bit/cycle SAR ADC With Background Offset Calibration.

Dengquan Li, Zhangming Zhu, Jiaxin Liu, Haoyu Zhuang, Yintang Yang, Nan Sun

IEEE J. Solid State Circuits, 2020

An OTA-Less Second-Order VCO-Based CT $\Delta\Sigma$ Modulator Using an Inherent Passive Integrator and Capacitive Feedback.

Shaolan Li, David Z. Pan, Nan Sun

IEEE J. Solid State Circuits, 2020

A Pipeline SAR ADC With Second-Order Interstage Gain Error Shaping.

Chen-Kai Hsu, Timothy R. Andeen, Nan Sun

IEEE J. Solid State Circuits, 2020

A New Method Based on Coding Sequence Density to Cluster Bacteria.

Nan Sun, Rui Dong, Shaojun Pei, Changchuan Yin, Stephen S.-T. Yau

J. Comput. Biol., 2020

An Always-on 4× Compressive VGA CMOS Imager with 51pJ/Pixel and >32dB PSNR.

Wenda Zhao, Chanmin Park, Injun Park, Nan Sun, Youngcheol Chae

Proceedings of the IEEE Symposium on VLSI Circuits, 2020

A 10-Bit 100-MS/s SAR ADC with Always-on Reference Ripple Cancellation.

Xiyuan Tang, Yi Shen, Xin Xin, Shubin Liu, Jueping Cai, Zhangming Zhu, Nan Sun

Proceedings of the IEEE Symposium on VLSI Circuits, 2020

A SAR ADC with Reduced kT/C Noise by Decoupling Noise PSD and BW.

Zhelu Li, Arnab Dutta, Abhishek Mukherjee, Xiyuan Tang, Linxiao Shen, Lenian He, Nan Sun

Proceedings of the IEEE Symposium on VLSI Circuits, 2020

A Portable NMR System with 50-kHz IF, 10-us Dead Time, and Frequency Tracking.

Sungjin Hong, Nan Sun

Proceedings of the IEEE Symposium on VLSI Circuits, 2020

9.5 A 13.5b-ENOB Second-Order Noise-Shaping SAR with PVT-Robust Closed-Loop Dynamic Amplifier.

Xiyuan Tang, Xiangxing Yang, Wenda Zhao, Chen-Kai Hsu, Jiaxin Liu, Linxiao Shen, Abhishek Mukherjee, Wei Shi, David Z. Pan, Nan Sun

Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

9.3 A 40kHz-BW 90dB-SNDR Noise-Shaping SAR with 4× Passive Gain and 2^nd-Order Mismatch Error Shaping.

Jiaxin Liu, Xing Wang, Zijie Gao, Mingtao Zhan, Xiyuan Tang, Nan Sun

Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

16.5 A 13b 0.005mm² 40MS/s SAR ADC with kT/C Noise Cancellation.

Jiaxin Liu, Xiyuan Tang, Wenda Zhao, Linxiao Shen, Nan Sun

Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

An Energy-Efficient Flexible Capacitive Pressure Sensing System.

Yuxuan Huang, Qinghang Zhao, Xiyuan Tang, Fang Su, Nan Sun, Huazhong Yang, Yongpan Liu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Toward Silicon-Proven Detailed Routing for Analog and Mixed-Signal Circuits.

Hao Chen, Keren Zhu, Mingjie Liu, Xiyuan Tang, Nan Sun, David Z. Pan

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

Effective Analog/Mixed-Signal Circuit Placement Considering System Signal Flow.

Keren Zhu, Hao Chen, Mingjie Liu, Xiyuan Tang, Nan Sun, David Z. Pan

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

Towards Decrypting the Art of Analog Layout: Placement Quality Prediction via Transfer Learning.

Mingjie Liu, Keren Zhu, Jiaqi Gu, Linxiao Shen, Xiyuan Tang, Nan Sun, David Z. Pan

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

Closing the Design Loop: Bayesian Optimization Assisted Hierarchical Analog Layout Synthesis.

Mingjie Liu, Keren Zhu, Xiyuan Tang, Biying Xu, Wei Shi, Nan Sun, David Z. Pan

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

GCN-RL Circuit Designer: Transferable Transistor Sizing with Graph Neural Networks and Reinforcement Learning.

Hanrui Wang, Kuan Wang, Jiacheng Yang, Linxiao Shen, Nan Sun, Hae-Seung Lee, Song Han

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

A Fully-Dynamic Time-Interleaved Noise-Shaping SAR ADC Based on CIFF Architecture.

Haoyu Zhuang, Jiaxin Liu, Nan Sun

Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020

A 77.1-dB 6.25-MHz-BW Pipeline SAR ADC with Enhanced Interstage Gain Error Shaping and Quantization Error Shaping.

Chen-Kai Hsu, Xiyuan Tang, Wenda Zhao, Rui Xu, Abhishek Mukherjee, Timothy R. Andeen, Nan Sun

Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020

A Power-Efficient 13-Tap FIR filter and an IIR Filter Embedded in a 10-bit SAR ADC.

Xin Xin, Linxiao Shen, Xiyuan Tang, Yi Shen, Jueping Cai, Nan Sun

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2020

S³DET: Detecting System Symmetry Constraints for Analog Circuits with Graph Similarity.

Mingjie Liu, Wuxi Li, Keren Zhu, Biying Xu, Yibo Lin, Linxiao Shen, Xiyuan Tang, Nan Sun, David Z. Pan

Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2019

A 10-b 600-MS/s 2-Way Time-Interleaved SAR ADC With Mean Absolute Deviation-Based Background Timing-Skew Calibration.

Jeonggoo Song, Kareem Ragab, Xiyuan Tang, Nan Sun

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Error-Feedback Mismatch Error Shaping for High-Resolution Data Converters.

Jiaxin Liu, Chen-Kai Hsu, Xiyuan Tang, Shaolan Li, Guangjun Wen, Nan Sun

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

A 10-Bit 600-MS/s Time-Interleaved SAR ADC With Interpolation-Based Timing Skew Calibration.

Dengquan Li, Zhangming Zhu, Ruixue Ding, Maliang Liu, Yintang Yang, Nan Sun

IEEE Trans. Circuits Syst. II Express Briefs, 2019

A Second-Order Noise-Shaping SAR ADC With Passive Integrator and Tri-Level Voting.

Haoyu Zhuang, Wenjuan Guo, Jiaxin Liu, He Tang, Zhangming Zhu, Long Chen, Nan Sun

IEEE J. Solid State Circuits, 2019

A Two-Step ADC With a Continuous-Time SAR-Based First Stage.

Linxiao Shen, Nan Sun, Yi Shen, Zhelu Li, Wei Shi, Xiyuan Tang, Shaolan Li, Wenda Zhao, Mantian Zhang, Zhangming Zhu

IEEE J. Solid State Circuits, 2019

A 0.029-mm² 17-fJ/Conversion-Step Third-Order CT ΔΣ ADC With a Single OTA and Second-Order Noise-Shaping SAR Quantizer.

Jiaxin Liu, Shaolan Li, Wenjuan Guo, Guangjun Wen, Nan Sun

IEEE J. Solid State Circuits, 2019

Advances in Voltage-Controlled-Oscillator-Based ΔΣ ADCs.

Shaolan Li, Arindam Sanyal, Kyoungtae Lee, Yeonam Yoon, Xiyuan Tang, Yi Zhong, Kareem Ragab, Nan Sun

IEICE Trans. Electron., 2019

An Energy-Efficient Comparator with Dynamic Floating Inverter Pre-Amplifier.

Xiyuan Tang, Begum Kasap, Linxiao Shen, Xiangxing Yang, Wei Shi, Nan Sun

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

A 0.6-V Tail-Less Inverter Stacking Amplifier with 0.96 PEF.

Linxiao Shen, Abhishek Mukherjee, Shaolan Li, Xiyuan Tang, Nanshu Lu, Nan Sun

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

A 75.8dB-SNDR Pipeline SAR ADC with 2^nd-order Interstage Gain Error Shaping.

Chen-Kai Hsu, Nan Sun

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

A 16fJ/Conversion-Step Time-Domain Two-Step Capacitance-to-Digital Converter.

Xiyuan Tang, Shaolan Li, Linxiao Shen, Wenda Zhao, Xiangxing Yang, Randy Williams, Jiaxin Liu, Zhichao Tan, Neal A. Hall, Nan Sun

Proceedings of the IEEE International Solid- State Circuits Conference, 2019

A 0.01mm² 25µW 2MS/s 74dB-SNDR Continuous-Time Pipelined-SAR ADC with 120fF Input Capacitor.

Linxiao Shen, Yi Shen, Xiyuan Tang, Chen-Kai Hsu, Wei Shi, Shaolan Li, Wenda Zhao, Abhishek Mukherjee, Nan Sun

Proceedings of the IEEE International Solid- State Circuits Conference, 2019

Device Layer-Aware Analytical Placement for Analog Circuits.

Biying Xu, Shaolan Li, Chak-Wa Pui, Derong Liu, Linxiao Shen, Yibo Lin, Nan Sun, David Z. Pan

Proceedings of the 2019 International Symposium on Physical Design, 2019

GeniusRoute: A New Analog Routing Paradigm Using Generative Neural Network Guidance.

Keren Zhu, Mingjie Liu, Yibo Lin, Biying Xu, Shaolan Li, Xiyuan Tang, Nan Sun, David Z. Pan

Proceedings of the International Conference on Computer-Aided Design, 2019

MAGICAL: Toward Fully Automated Analog IC Layout Leveraging Human and Machine Intelligence: Invited Paper.

Biying Xu, Keren Zhu, Mingjie Liu, Yibo Lin, Shaolan Li, Xiyuan Tang, Nan Sun, David Z. Pan

Proceedings of the International Conference on Computer-Aided Design, 2019

WellGAN: Generative-Adversarial-Network-Guided Well Generation for Analog/Mixed-Signal Circuit Layout.

Biying Xu, Yibo Lin, Xiyuan Tang, Shaolan Li, Linxiao Shen, Nan Sun, David Z. Pan

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

A 2.4-GHz ΔΣ Fractional-N Synthesizer with Space-Time Averaging for Noise Reduction.

Yanlong Zhang, Arindam Sanyal, Xing Quan, Kailin Wen, Xiyuan Tang, Gang Jin, Li Geng, Nan Sun

Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

A 10b 120MS/s SAR ADC with Reference Ripple Cancellation Technique.

Xiyuan Tang, Yi Shen, Linxiao Shen, Wenda Zhao, Zhangming Zhu, Visvesh Sathe, Nan Sun

Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

A 0.025-mm² 0.8-V 78.5dB-SNDR VCO-Based Sensor Readout Circuit in a Hybrid PLL-ΔΣM Structure.

Shaolan Li, Wenda Zhao, Biying Xu, Xiangxing Yang, Xiyuan Tang, Linxiao Shen, Nanshu Lu, David Z. Pan, Nan Sun

Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

A 60-fJ/step 11-ENOB VCO-based CTDSM Synthesized from Digital Standard Cell Library.

Shaolan Li, Biying Xu, David Z. Pan, Nan Sun

Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

A 7b 2.6mW 900MS/s Nonbinary 2-then-3b/cycle SAR ADC with Background Offset Calibration.

Dengquan Li, Jiaxin Liu, Haoyu Zhuang, Zhangming Zhu, Yintang Yang, Nan Sun

Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

2018

A 1-V 0.25-µW Inverter Stacking Amplifier With 1.07 Noise Efficiency Factor.

Linxiao Shen, Nanshu Lu, Nan Sun

IEEE J. Solid State Circuits, 2018

A 13-ENOB Second-Order Noise-Shaping SAR ADC Realizing Optimized NTF Zeros Using the Error-Feedback Structure.

Shaolan Li, Bo Qiao, Miguel Gandara, David Z. Pan, Nan Sun

IEEE J. Solid State Circuits, 2018

A 0.029MM2 17-FJ/Conv.-Step CT $\Delta\Sigma$ ADC with 2^nd-Order Noise-Shaping SAR Quantizer.

Jiaxin Liu, Shaolan Li, Wenjuan Guo, Guangjun Wen, Nan Sun

Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

A 13-ENOB 2^nd-order noise-shaping SAR ADC realizing optimized NTF zeros using an error-feedback structure.

Shaolan Li, Bo Qiao, Miguel Gandara, Nan Sun

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

Low-power Scaling-friendly Ring Oscillator based ΔΣ ADC.

Arindam Sanyal, Shaolan Li, Nan Sun

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

A Second-Order Purely VCO-Based CT Δ∑ ADC Using a Modified DPLL in 40-nm CMOS.

Yi Zhong, Shaolan Li, Arindam Sanyal, Xiyuan Tang, Linxiao Shen, Siliang Wu, Nan Sun

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

2017

A 0.95-mW 6-b 700-MS/s Single-Channel Loop-Unrolled SAR ADC in 40-nm CMOS.

Long Chen, Kareem Ragab, Xiyuan Tang, Jeonggoo Song, Arindam Sanyal, Nan Sun

IEEE Trans. Circuits Syst. II Express Briefs, 2017

A 10-b 800-MS/s Time-Interleaved SAR ADC With Fast Variance-Based Timing-Skew Calibration.

Jeonggoo Song, Kareem Ragab, Xiyuan Tang, Nan Sun

IEEE J. Solid State Circuits, 2017

An Energy-Efficient Hybrid SAR-VCO ΔΣ Capacitance-to-Digital Converter in 40-nm CMOS.

Arindam Sanyal, Nan Sun

IEEE J. Solid State Circuits, 2017

A 12-b ENOB 2.5-MHz BW VCO-Based 0-1 MASH ADC With Direct Digital Background Calibration.

Kareem Ragab, Nan Sun

IEEE J. Solid State Circuits, 2017

A 174.3-dB FoM VCO-Based CT ΔΣ Modulator With a Fully-Digital Phase Extended Quantizer and Tri-Level Resistor DAC in 130-nm CMOS.

Shaolan Li, Abhishek Mukherjee, Nan Sun

IEEE J. Solid State Circuits, 2017

A 0.7-V 0.6-µW 100-kS/s Low-Power SAR ADC With Statistical Estimation-Based Noise Reduction.

Long Chen, Xiyuan Tang, Arindam Sanyal, Yeonam Yoon, Jie Cong, Nan Sun

IEEE J. Solid State Circuits, 2017

Integrated CMOS spectrometer for multi-dimensional NMR spectroscopy.

Dongwan Ha, Nan Sun, Jeffrey Paulsen, Yi-Qiao Song, Yiqiao Tang, Sungjin Hong, Donhee Ham

Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

Hierarchical and Analytical Placement Techniques for High-Performance Analog Circuits.

Biying Xu, Shaolan Li, Xiaoqing Xu, Nan Sun, David Z. Pan

Proceedings of the 2017 ACM on International Symposium on Physical Design, 2017

NFC-enabled, tattoo-like stretchable biosensor manufactured by "cut-and-paste" method.

Hyoyoung Jeong, Taewoo Ha, Irene Kuang, Linxiao Shen, Zhaohe Dai, Nan Sun, Nanshu Lu

Proceedings of the 2017 39th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), 2017

A Scaling Compatible, Synthesis Friendly VCO-based Delta-sigma ADC Design and Synthesis Methodology.

Biying Xu, Shaolan Li, Nan Sun, David Z. Pan

Proceedings of the 54th Annual Design Automation Conference, 2017

A 10-b 2b/cycle 300MS/s SAR ADC with a single differential DAC in 40nm CMOS.

Jeonggoo Song, Xiyuan Tang, Nan Sun

Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

A pipelined SAR ADC reusing the comparator as residue amplifier.

Miguel Gandara, Wenjuan Guo, Xiyuan Tang, Long Chen, Yeonam Yoon, Nan Sun

Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

A 1.5fJ/conv-step 10b 100kS/s SAR ADC with gain-boosted dynamic comparator.

Xiyuan Tang, Long Chen, Jeonggoo Song, Nan Sun

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017

A 172dB-FoM pipelined SAR ADC using a regenerative amplifier with self-timed gain control and mixed-signal background calibration.

Miguel Gandara, Paridhi Gulati, Nan Sun

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017

2016

A 18.5-fJ/step VCO-based 0-1 MASH ΔΣ ADC with digital background calibration.

Arindam Sanyal, Nan Sun

Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

Comparator common-mode variation effects analysis and its application in SAR ADCs.

Long Chen, Arindam Sanyal, Ji Ma, Xiyuan Tang, Nan Sun

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

A 10-b 750µW 200MS/s fully dynamic single-channel SAR ADC in 40nm CMOS.

Xiyuan Tang, Long Chen, Jeonggoo Song, Nan Sun

Proceedings of the ESSCIRC Conference 2016: 42^nd European Solid-State Circuits Conference, 2016

A 55fJ/conv-step hybrid SAR-VCO ΔΣ capacitance-to-digital converter in 40nm CMOS.

Arindam Sanyal, Nan Sun

Proceedings of the ESSCIRC Conference 2016: 42^nd European Solid-State Circuits Conference, 2016

A 1.4mW 8b 350MS/s loop-unrolled SAR ADC with background offset calibration in 40nm CMOS.

Kareem Ragab, Nan Sun

Proceedings of the ESSCIRC Conference 2016: 42^nd European Solid-State Circuits Conference, 2016

A 174.3dB FoM VCO-based CT ΔΣ modulator with a fully digital phase extended quantizer and tri-level resistor DAC in 130nm CMOS.

Shaolan Li, Nan Sun

Proceedings of the ESSCIRC Conference 2016: 42^nd European Solid-State Circuits Conference, 2016

A surrogate model assisted evolutionary algorithm for computationally expensive design optimization problems with discrete variables.

Bo Liu, Nan Sun, Qingfu Zhang, Vic Grout, Georges G. E. Gielen

Proceedings of the IEEE Congress on Evolutionary Computation, 2016

A 10-b 800MS/s time-interleaved SAR ADC with fast timing-skew calibration.

Jeonggoo Song, Kareem Ragab, Xiyuan Tang, Nan Sun

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016

2015

Dynamic Element Matching With Signal-Independent Element Transition Rates for Multibit ΔΣ Modulators.

Arindam Sanyal, Long Chen, Nan Sun

IEEE Trans. Circuits Syst. I Regul. Pap., 2015

A Novel Hybrid Radix-3/Radix-2 SAR ADC With Fast Convergence and Low Hardware Complexity.

Manzur Rahman, Arindam Sanyal, Nan Sun

IEEE Trans. Circuits Syst. II Express Briefs, 2015

Digital Background Calibration for Pipelined ADCs Based on Comparator Decision Time Quantization.

Kareem Ragab, Long Chen, Arindam Sanyal, Nan Sun

IEEE Trans. Circuits Syst. II Express Briefs, 2015

Dynamic Element Matching Techniques for Static and Dynamic Errors in Continuous-Time Multi-Bit ΔΣ Modulators.

Arindam Sanyal, Nan Sun

IEEE J. Emerg. Sel. Topics Circuits Syst., 2015

A 0.04-mm² 0.9-mW 71-dB SNDR distributed modular AS ADC with VCO-based integrator and digital DAC calibration.

Yeonam Yoon, Kyoungtae Lee, Sungjin Hong, Xiyuan Tang, Long Chen, Nan Sun

Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

A 12b ENOB, 2.5MHz-BW, 4.8mW VCO-based 0-1 MASH ADC with direct digital background nonlinearity calibration.

Kareem Ragab, Nan Sun

Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

A 10.5-b ENOB 645 nW 100kS/s SAR ADC with statistical estimation based noise reduction.

Long Chen, Xiyuan Tang, Arindam Sanyal, Yeonam Yoon, Jie Cong, Nan Sun

Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

2014

A Thermometer-Like Mismatch Shaping Technique With Minimum Element Transition Activity for Multibit ΔΣ DACs.

Arindam Sanyal, Peijun Wang, Nan Sun

IEEE Trans. Circuits Syst. II Express Briefs, 2014

An Energy-Efficient Low Frequency-Dependence Switching Technique for SAR ADCs.

Arindam Sanyal, Nan Sun

IEEE Trans. Circuits Syst. II Express Briefs, 2014

An enhanced ISI shaping technique for multi-bit ΔΣ DACs.

Arindam Sanyal, Nan Sun

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A low frequency-dependence, energy-efficient switching technique for bottom-plate sampled SAR ADC.

Arindam Sanyal, Nan Sun

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Algorithm and implementation of digital calibration of fast converging Radix-3 SAR ADC.

Manzur Rahman, Long Chen, Nan Sun

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Capacitor mismatch calibration for SAR ADCs based on comparator metastability detection.

Long Chen, Ji Ma, Nan Sun

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A 24-µW 11-bit 1-MS/s SAR ADC with a bidirectional single-side switching technique.

Long Chen, Arindam Sanyal, Ji Ma, Nan Sun

Proceedings of the ESSCIRC 2014, 2014

A hybrid SAR-VCO ΔΣ ADC with first-order noise shaping.

Arindam Sanyal, Kareem Ragab, Long Chen, T. R. Viswanathan, Shouli Yan, Nan Sun

Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

2013

Thermal Noise Analysis of a Programmable-Gain Switched-Capacitor Amplifier With Input Offset Cancellation.

Kareem Ragab, Mücahit Kozak, Nan Sun

IEEE Trans. Circuits Syst. II Express Briefs, 2013

A very high energy-efficiency switching technique for SAR ADCs.

Arindam Sanyal, Nan Sun

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

A fast radix-3 SAR analog-to-digital converter.

Long Chen, Manzur Rahman, Sha Liu, Nan Sun

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

A single SAR ADC converting multi-channel sparse signals.

Wenjuan Guo, Youngchun Kim, Arindam Sanyal, Ahmed H. Tewfik, Nan Sun

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2012

A simple and efficient dithering method for vector quantizer based mismatch-shaped ΔΣ DACs.

Arindam Sanyal, Nan Sun

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012