Nakul Pande
Orcid: 0000-0002-1753-0812
According to our database1,
Nakul Pande
authored at least 6 papers
between 2017 and 2022.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2022
IEEE ACM Trans. Comput. Biol. Bioinform., 2022
2019
An Energy-Efficient One-Shot Time-Based Neural Network Accelerator Employing Dynamic Threshold Error Correction in 65 nm.
IEEE J. Solid State Circuits, 2019
Investigating the Aging Dynamics of Diode-Connected MOS Devices Using an Array-Based Characterization Vehicle in a 65nm Process.
Proceedings of the IEEE International Reliability Physics Symposium, 2019
A Counter based ADC Non-linearity Measurement Circuit and Its Application to Reliability Testing.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019
2018
A 104.8TOPS/W One-Shot Time-Based Neuromorphic Chip Employing Dynamic Threshold Error Correction in 65nm.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018
2017