Nak Hee Seong

According to our database, Nak Hee Seong authored at least 9 papers between 2006 and 2020.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2020

2.4 A 7nm High-Performance and Energy-Efficient Mobile Application Processor with Tri-Cluster CPUs and a Sparsity-Aware NPU.

Young-Duk Kim, Wookyeong Jeong, Lakkyung Jung, Dongsuk Shin, Jae Geun Song, Jinook Song, Hyeokman Kwon, Jaeyoung Lee, Jaesu Jung, Myungjin Kang, Jaehun Jeong, Yoonjoo Kwon, Nak Hee Seong

Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2013

Pragmatic Integration of an SRAM Row Cache in Heterogeneous 3-D DRAM Architecture Using TSV.

Dong Hyuk Woo, Nak Hee Seong, Hsien-Hsin S. Lee

IEEE Trans. Very Large Scale Integr. Syst., 2013

Tri-level-cell phase change memory: toward an efficient and reliable memory system.

Nak Hee Seong, Sungkap Yeo, Hsien-Hsin S. Lee

Proceedings of the 40th Annual International Symposium on Computer Architecture, 2013

2012

A reliable, secure phase-change memory as a main memory.

Nak Hee Seong

PhD thesis, 2012

2011

Security Refresh: Protecting Phase-Change Memory against Malicious Wear Out.

Nak Hee Seong, Dong Hyuk Woo, Hsien-Hsin S. Lee

IEEE Micro, 2011

2010

SAFER: Stuck-At-Fault Error Recovery for Memories.

Nak Hee Seong, Dong Hyuk Woo, Vijayalakshmi Srinivasan, Jude A. Rivers, Hsien-Hsin S. Lee

Proceedings of the 43rd Annual IEEE/ACM International Symposium on Microarchitecture, 2010

Security refresh: prevent malicious wear-out and increase durability for phase-change memory with dynamically randomized address mapping.

Nak Hee Seong, Dong Hyuk Woo, Hsien-Hsin S. Lee

Proceedings of the 37th International Symposium on Computer Architecture (ISCA 2010), 2010

An optimized 3D-stacked memory architecture by exploiting excessive, high-density TSV bandwidth.

Dong Hyuk Woo, Nak Hee Seong, Dean L. Lewis, Hsien-Hsin S. Lee

Proceedings of the 16th International Conference on High-Performance Computer Architecture (HPCA-16 2010), 2010

2006

An SoC with 1.3 gtexels/s 3-D graphics full pipeline for consumer applications.

Donghyun Kim, Kyusik Chung, Chang-Hyo Yu, Chun-Ho Kim, Inho Lee, Jaewan Bae, Young-Jun Kim, Jae-Hyeon Park, Sungbeen Kim, Yong-Ha Park, Nak Hee Seong, Jin-Aeon Lee, Jaehong Park, Stephen Oh, Seh-Woong Jeong, Lee-Sup Kim

IEEE J. Solid State Circuits, 2006