Naixing Wang

According to our database1, Naixing Wang authored at least 14 papers between 2017 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2023
Conflict-driven Structural Learning Towards Higher Coverage Rate in ATPG.
CoRR, 2023

GPU-Based Concurrent Static Learning.
Proceedings of the IEEE International Test Conference, 2023

2022
Compression-Aware ATPG.
Proceedings of the IEEE International Test Conference, 2022

DeepTPI: Test Point Insertion with Deep Reinforcement Learning.
Proceedings of the IEEE International Test Conference, 2022

Neural Fault Analysis for SAT-based ATPG.
Proceedings of the IEEE International Test Conference, 2022

DeepGate: learning neural representations of logic gates.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

Accelerate SAT-based ATPG via Preprocessing and New Conflict Management Heuristics.
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

2021
Representation Learning of Logic Circuits.
CoRR, 2021

2019
Layout Resynthesis by Applying Design-for-manufacturability Guidelines to Avoid Low-coverage Areas of a Cell-based Design.
ACM Trans. Design Autom. Electr. Syst., 2019

Resynthesis for Avoiding Undetectable Faults Based on Design-for-Manufacturability Guidelines.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

TEA: A Test Generation Algorithm for Designs with Timing Exceptions.
Proceedings of the 28th IEEE Asian Test Symposium, 2019

2018
Improving the Resolution of Multiple Defect Diagnosis by Removing and Selecting Tests.
Proceedings of the 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2018

2017
On Reliability of Android Wearable Health Devices.
CoRR, 2017

Functional Broadside Test Generation Using a Commercial ATPG Tool.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017


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