Nail Etkin Can Akkaya

According to our database, Nail Etkin Can Akkaya authored at least 10 papers between 2015 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

A 135.6Tbps/W 2R2W SRAM with 12T Logic Bit-cell with Vmin Down to 335mV Targeted for Machine-Learning Applications in 6nm FinFET CMOS Technology.

Nail Etkin Can Akkaya, Gary Chan, Hung-Jen Liao, Yih Wang, Jonathan Chang

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

2019

Secure hardware-entangled field programmable gate arrays.

Burak Erbagci, Nail Etkin Can Akkaya, Mudit Bhargava, Rachel Dondero, Ken Mai

J. Parallel Distributed Comput., 2019

An Inherently Secure FPGA using PUF Hardware-Entanglement and Side-Channel Resistant Logic in 65nm Bulk CMOS.

Burak Erbagci, Nail Etkin Can Akkaya, Cagri Erbagci, Ken Mai

Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019

2018

A secure camouflaged logic family using post-manufacturing programming with a 3.6GHz adder prototype in 65nm CMOS at 1V nominal VDD.

Nail Etkin Can Akkaya, Burak Erbagci, Ken Mai

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

A compact energy-efficient pseudo-static camouflaged logic family.

Prashanth Mohan, Nail Etkin Can Akkaya, Burak Erbagci, Ken Mai

Proceedings of the 2018 IEEE International Symposium on Hardware Oriented Security and Trust, 2018

Secure chip odometers using intentional controlled aging.

Nail Etkin Can Akkaya, Burak Erbagci, Ken Mai

Proceedings of the 2018 IEEE International Symposium on Hardware Oriented Security and Trust, 2018

2016

A secure camouflaged threshold voltage defined logic family.

Burak Erbagci, Cagri Erbagci, Nail Etkin Can Akkaya, Ken Mai

Proceedings of the 2016 IEEE International Symposium on Hardware Oriented Security and Trust, 2016

2015

A DPA-resistant self-timed three-phase dual-rail pre-charge logic family.

Nail Etkin Can Akkaya, Burak Erbagci, Raymond Carley, Ken Mai

Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2015

A 275 Gbps AES encryption accelerator using ROM-based S-boxes in 65nm.

Burak Erbagci, Nail Etkin Can Akkaya, Craig Teegarden, Ken Mai

Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

A 32kB secure cache memory with dynamic replacement mapping in 65nm bulk CMOS.

Burak Erbagci, Fangfei Liu, Cagla Cakir, Nail Etkin Can Akkaya, Ruby B. Lee, Ken Mai

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015