Nai-Chen Cheng

Affiliations:
  • Industrial Technology Research Institute (ITRI), Information and Communications Research Lab, Hsinchu, Taiwan


According to our database1, Nai-Chen Cheng authored at least 8 papers between 2007 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
A 0.296pJ/bit 17.9Tb/s/mm<sup>2</sup> Die-to-Die Link in 5nm/6nm FinFET on a 9μm-Pitch 3D Package Achieving 10.24Tb/s Bandwidth at 16Gb/s PAM-4.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2016
A 0.8V, 43.5μW ECG signal acquisition IC with a referenceless time-to-digital converter.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Invited - Wireless sensor nodes for environmental monitoring in internet of things.
Proceedings of the 53rd Annual Design Automation Conference, 2016

2013
A 32.4 μW RF front end for 2.4 GHz wake-up receiver.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

A 3.4mW 2.3-to-2.7GHz frequency synthesizer in 0.18-µm CMOS.
Proceedings of the ESSCIRC 2013, 2013

2010
An embedded wide-range and high-resolution CLOCK jitter measurement circuit.
Proceedings of the Design, Automation and Test in Europe, 2010

2008
Experimental Results of Built-In Jitter Measurement for Gigahertz Clock.
Proceedings of the 17th IEEE Asian Test Symposium, 2008

2007
A 2-ps Resolution Wide Range BIST Circuit for Jitter Measurement.
Proceedings of the 16th Asian Test Symposium, 2007


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