Nagu R. Dhanwada

According to our database, Nagu R. Dhanwada authored at least 24 papers between 1998 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2021

Energy Efficiency Boost in the AI-Infused POWER10 Processor.

Brian W. Thompto, Dung Q. Nguyen, José E. Moreira, Ramon Bertran, Hans M. Jacobson, Richard J. Eickemeyer, Rahul M. Rao, Michael Goulet, Marcy Byers, Christopher J. Gonzalez, Karthik Swaminathan, Nagu R. Dhanwada, Silvia M. Müller, Andreas Wagner, Satish Kumar Sadasivam, Robert K. Montoye, William J. Starke, Christian G. Zoellin, Michael S. Floyd, Jeffrey Stuecheli, Nandhini Chandramoorthy, John-David Wellman, Alper Buyuktosunoglu, Matthias Pflanz, Balaram Sinharoy, Pradip Bose

Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021

2019

Heterogeneity Aware Power Abstraction for Hierarchical Power Analysis.

Arun Joseph, Spandana Rachamalla, Shashidhar Reddy, Nagu R. Dhanwada

Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

2014

Process Synchronization in Multi-core Systems Using On-Chip Memories.

Arun Joseph, Nagu R. Dhanwada

Proceedings of the 2014 27th International Conference on VLSI Design, 2014

Towards a standard flow for system level power modeling.

Nagu R. Dhanwada, William Rhett Davis, Jerry Frenkil

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

2013

Efficient PVT independent abstraction of large IP blocks for hierarchical power analysis.

Nagu R. Dhanwada, David J. Hathaway, Victor V. Zyuban, Peng Peng, Karl Moody, William W. Dungan, Arun Joseph, Rahul M. Rao, Christopher J. Gonzalez

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

2012

Leakage Power Contributor Modeling.

Nagu R. Dhanwada, David J. Hathaway, Jerry Frenkil, W. Rhett Davis, Harun Demircioglu

IEEE Des. Test Comput., 2012

2008

Exploring power management in multi-core systems.

Reinaldo A. Bergamaschi, Guoling Han, Alper Buyuktosunoglu, Hiren D. Patel, Indira Nair, Gero Dittmann, Geert Janssen, Nagu R. Dhanwada, Zhigang Hu, Pradip Bose, John A. Darringer

Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008

2007

Performance modeling for early analysis of multi-core systems.

Reinaldo A. Bergamaschi, Indira Nair, Gero Dittmann, Hiren D. Patel, Geert Janssen, Nagu R. Dhanwada, Alper Buyuktosunoglu, Emrah Acar, Gi-Joon Nam, Dorothy Kucar, Pradip Bose, John A. Darringer, Guoling Han

Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, 2007

2006

Hierarchical constraint transformation based on genetic optimization for analog system synthesis.

Nagu R. Dhanwada, Alex Doboli, Adrián Núñez-Aldana, Ranga Vemuri

Integr., 2006

Transaction Level Error Susceptibility Model for Bus Based SoC Architectures.

Ing-Chao Lin, Suresh Srinivasan, Narayanan Vijaykrishnan, Nagu R. Dhanwada

Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006

2005

Transaction-level modeling for architectural and power analysis of PowerPC and CoreConnect-based systems.

Nagu R. Dhanwada, Reinaldo A. Bergamaschi, William W. Dungan, Indira Nair, Paul Gramann, William E. Dougherty, Ing-Chao Lin

Des. Autom. Embed. Syst., 2005

Temperature-Aware Voltage Islands Architecting in System-on-Chip Design.

Wei-Lun Hung, Greg M. Link, Yuan Xie, Narayanan Vijaykrishnan, Nagu R. Dhanwada, John Conner

Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005

A power estimation methodology for systemC transaction level models.

Nagu R. Dhanwada, Ing-Chao Lin, Vijaykrishnan Narayanan

Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2005

2004

A two-layer library-based approach to synthesis of analog systems from VHDL-AMS specifications.

Alex Doboli, Nagu R. Dhanwada, Adrián Núñez-Aldana, Ranga Vemuri

ACM Trans. Design Autom. Electr. Syst., 2004

Architecting voltage islands in core-based system-on-a-chip designs.

Jingcao Hu, Youngsoo Shin, Nagu R. Dhanwada, Radu Marculescu

Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004

2003

Design topology aware physical metrics for placement analysis.

Shyam Ramji, Nagu R. Dhanwada

Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, 2003

SEAS: a system for early analysis of SoCs.

Reinaldo A. Bergamaschi, Youngsoo Shin, Nagu R. Dhanwada, Subhrajit Bhattacharya, William E. Dougherty, Indira Nair, John A. Darringer, Sarala Paliwal

Proceedings of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2003

2000

A heuristic technique for system-level architecture generation from signal-flow graph representations of analog systems.

Alex Doboli, Nagu R. Dhanwada, Ranga Vemuri

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999

Component Characterization and Constraint Transformation Based on Directed Intervals for Analog Synthesis.

Nagu R. Dhanwada, Adrián Núñez-Aldana, Ranga Vemuri

Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999

A genetic approach to simultaneous parameter space exploration and constraint transformation in analog synthesis.

Nagu R. Dhanwada, Adrián Núñez-Aldana, Ranga Vemuri

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

Hierarchical Constraint Transformation Using Directed Interval Search for Analog System Synthesis.

Nagu R. Dhanwada, Adrián Núñez-Aldana, Ranga Vemuri

Proceedings of the 1999 Design, 1999

Behavioral Synthesis of Analog Systems Using Two-layered Design Space Exploration.

Alex Doboli, Adrián Núñez-Aldana, Nagu R. Dhanwada, Sree Ganesan, Ranga Vemuri

Proceedings of the 36th Conference on Design Automation, 1999

Automatic Constraint Transformation with Integrated Parameter Space Exploration in Analog System Synthesis.

Nagu R. Dhanwada, Adrián Núñez-Aldana, Ranga Vemuri

Proceedings of the 1999 Conference on Asia South Pacific Design Automation, 1999

1998

Constraint Allocation in Analog System Synthesis.

Nagu R. Dhanwada, Ranga Vemuri

Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998