Nagesh Tamarapalli
According to our database1,
Nagesh Tamarapalli
authored at least 22 papers
between 1996 and 2015.
Collaborative distances:
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Bibliography
2015
Tutorial T5: High Performance Low Power Designs - Challenges and Best practices in Design, Verification and Test.
Proceedings of the 28th International Conference on VLSI Design, 2015
2014
Proceedings of the 2014 27th International Conference on VLSI Design, 2014
2013
Proceedings of the 26th International Conference on VLSI Design and 12th International Conference on Embedded Systems, 2013
2012
Tutorial T3: DFM, DFT, Silicon Debug and Diagnosis - The Loop to Ensure Product Yield.
Proceedings of the 25th International Conference on VLSI Design, 2012
2008
Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008
2006
Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006
Proceedings of the 2006 IEEE International Test Conference, 2006
Proceedings of the 2006 IEEE International Test Conference, 2006
Proceedings of the 2006 IEEE International Test Conference, 2006
Proceedings of the 15th Asian Test Symposium, 2006
2005
Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005
Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005
2004
Proceedings of the 13th Asian Test Symposium (ATS 2004), 2004
2003
Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003
Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003
2002
Proceedings of the Proceedings IEEE International Test Conference 2002, 2002
2000
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000
1999
Proceedings of the Proceedings IEEE International Test Conference 1999, 1999
1998
Proceedings of the Proceedings IEEE International Test Conference 1998, 1998
1996
Proceedings of the Proceedings IEEE International Test Conference 1996, 1996