Nagatoshi Ohki
According to our database1,
Nagatoshi Ohki
authored at least 5 papers
between 1992 and 1996.
Collaborative distances:
Collaborative distances:
Timeline
1992
1993
1994
1995
1996
0
1
2
3
1
2
1
1
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
1996
A 1-V, 100-MHz, 10-mW cache using a separated bit-line memory hierarchy architecture and domino tag comparators.
IEEE J. Solid State Circuits, 1996
1995
IEEE J. Solid State Circuits, November, 1995
IEEE J. Solid State Circuits, April, 1995
1993
IEEE J. Solid State Circuits, November, 1993
1992
IEEE J. Solid State Circuits, March, 1992