Nadjia Anane

According to our database, Nadjia Anane authored at least 10 papers between 2008 and 2015.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2015

SHA-2 hardware core for virtex-5 FPGA.

Mohamed Anane, Nadjia Anane

Proceedings of the 12th IEEE International Multi-Conference on Systems, Signals & Devices, 2015

AES IP for hybrid cryptosystem RSA-AES.

Nadjia Anane, Mohamed Anane

Proceedings of the 12th IEEE International Multi-Conference on Systems, Signals & Devices, 2015

2014

Software/Hardware Co-Design of Modular Exponentiation for Efficient RSA Cryptosystem.

Mohamed Issad, Bachir Boudraa, Mohamed Anane, Nadjia Anane

J. Circuits Syst. Comput., 2014

High throughput parallel montgomery modular exponentiation on FPGA.

Nadjia Anane, Mohamed Anane

Proceedings of the 9th International Design and Test Symposium, 2014

2013

High radix montgomery modular multiplication on FPGA.

Mohamed Anane, Nadjia Anane

Proceedings of the 8th International Design and Test Symposium, 2013

FPGA implementation of the m-ary modular exponentiation.

Nadjia Anane, Mohamed Anane

Proceedings of the 8th International Design and Test Symposium, 2013

2011

An optimised architecture for radix-2 Montgomery modular multiplication on FPGA.

Mohamed Issad, Mohamed Anane, Nadjia Anane

Int. J. High Perform. Syst. Archit., 2011

2009

Hardware algorithm for variable precision multiplication on FPGA.

Nadjia Anane, Mohamed Anane, Hamid Bessalah, Mohamed Issad, Khadidja Messaoudi

Proceedings of the 7th IEEE/ACS International Conference on Computer Systems and Applications, 2009

Reconfigurable architecture for elementary functions evaluation.

Mohamed Anane, Nadjia Anane, Hamid Bessalah, Mohamed Issad

Proceedings of the 7th IEEE/ACS International Conference on Computer Systems and Applications, 2009

2008

Higher Radix and Redundancy Factor for Floating Point SRT Division.

Mohamed Anane, Hamid Bessalah, Mohamed Issad, Nadjia Anane, Hassen Salhi

IEEE Trans. Very Large Scale Integr. Syst., 2008