Nacho Navarro
According to our database1,
Nacho Navarro
authored at least 78 papers
between 1995 and 2024.
Collaborative distances:
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Bibliography
2024
CoRR, 2024
2023
Proceedings of the IEEE International Conference on Software Maintenance and Evolution, 2023
2022
Proceedings of the 44th IEEE/ACM International Conference on Software Engineering: Software Engineering in Practice, 2022
2017
Data stream classification using random feature functions and novel method combinations.
J. Syst. Softw., 2017
Int. J. Parallel Program., 2017
Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017
An open benchmark implementation for multi-CPU multi-GPU pedestrian detection in automotive systems.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017
Direct Inter-Process Communication (dIPC): Repurposing the CODOMs Architecture to Accelerate IPC.
Proceedings of the Twelfth European Conference on Computer Systems, 2017
2016
2015
Runtime and Architecture Support for Efficient Data Exchange in Multi-Accelerator Applications.
IEEE Trans. Parallel Distributed Syst., 2015
Hardware-Software Coherence Protocol for the Coexistence of Caches and Local Memories.
IEEE Trans. Computers, 2015
Proceedings of the 2015 International Conference on Embedded Computer Systems: Architectures, 2015
Proceedings of the 8th Workshop on General Purpose Processing using GPUs, 2015
Coherence protocol for transparent management of scratchpad memories in shared memory manycore architectures.
Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015
iONE: An environment for experimentally assessing in-operation network planning algorithms.
Proceedings of the 17th International Conference on Transparent Optical Networks, 2015
Proceedings of the 29th ACM on International Conference on Supercomputing, 2015
Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015
2014
Microprocess. Microsystems, 2014
Analyzing Performance Improvements and Energy Savings in Infiniband Architecture using Network Compression.
Proceedings of the 26th IEEE International Symposium on Computer Architecture and High Performance Computing, 2014
Experimental assessment of a high performance backend PCE for flexgrid optical network re-optimization.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2014
Proceedings of the ACM/IEEE 41st International Symposium on Computer Architecture, 2014
Proceedings of the ACM/IEEE 41st International Symposium on Computer Architecture, 2014
Proceedings of the 16th International Conference on Transparent Optical Networks, 2014
Proceedings of the 43rd International Conference on Parallel Processing, 2014
Proceedings of the International Conference on Parallel Architectures and Compilation, 2014
2013
A Systematic Methodology to Generate Decomposable and Responsive Power Models for CMPs.
IEEE Trans. Computers, 2013
A template system for the efficient compilation of domain abstractions onto reconfigurable computers.
J. Syst. Archit., 2013
The TERAFLUX Project: Exploiting the DataFlow Paradigm in Next Generation Teradevices.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013
Proceedings of the 6th Workshop on General Purpose Processor Using Graphics Processing Units, 2013
2012
Energy accounting for shared virtualized environments under DVFS using PMC-based power models.
Future Gener. Comput. Syst., 2012
POTRA: a framework for building power models for next generation multicore architectures.
Proceedings of the ACM SIGMETRICS/PERFORMANCE Joint International Conference on Measurement and Modeling of Computer Systems, 2012
Assessing the Impact of Network Compression on Molecular Dynamics and Finite Element Methods.
Proceedings of the 14th IEEE International Conference on High Performance Computing and Communication & 9th IEEE International Conference on Embedded Software and Systems, 2012
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012
Proceedings of the Computing Frontiers Conference, CF'12, 2012
Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2012
2011
IEEE Trans. Parallel Distributed Syst., 2011
Comput. J., 2011
Proceedings of the IEEE 9th Symposium on Application Specific Processors, 2011
Proceedings of the 20th ACM International Symposium on High Performance Distributed Computing, 2011
Implementation of a Reverse Time Migration kernel using the HCE High Level Synthesis tool.
Proceedings of the 2011 International Conference on Field-Programmable Technology, 2011
Proceedings of the Euro-Par 2011 Parallel Processing - 17th International Conference, 2011
DiDi: Mitigating the Performance Impact of TLB Shootdowns Using a Shared TLB Directory.
Proceedings of the 2011 International Conference on Parallel Architectures and Compilation Techniques, 2011
2010
Decomposable and responsive power models for multicore processors using performance counters.
Proceedings of the 24th International Conference on Supercomputing, 2010
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010
Proceedings of the 15th International Conference on Architectural Support for Programming Languages and Operating Systems, 2010
2009
Trans. High Perform. Embed. Archit. Compil., 2009
Sensors, 2009
Proceedings of the 2009 International Conference of the Chilean Computer Science Society, 2009
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2009
Proceedings of the High Performance Embedded Architectures and Compilers, 2009
Proceedings of the 2009 International Conference on Field-Programmable Technology, 2009
2008
Proceedings of the 22nd Annual International Conference on Supercomputing, 2008
2007
Trans. High Perform. Embed. Archit. Compil., 2007
Proceedings of the 44th Design Automation Conference, 2007
Proceedings of the 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), 2007
2006
IEEE Trans. Computers, 2006
Java Virtual Machine: the key for accurated memory prefetching.
Proceedings of the International Conference on Software Engineering Research and Practice & Conference on Programming Languages and Compilers, 2006
2003
Proceedings of the 2003 IEEE International Symposium on Performance Analysis of Systems and Software, 2003
2001
Concurr. Comput. Pract. Exp., 2001
2000
Concurr. Pract. Exp., 2000
Proceedings of the General Track: 2000 USENIX Annual Technical Conference, 2000
Proceedings of the Languages and Compilers for Parallel Computing, 2000
Proceedings of the Job Scheduling Strategies for Parallel Processing, IPDPS 2000 Workshop, 2000
Proceedings of the ACM 2000 Java Grande Conference, San Francisco, CA, USA, 2000
Applying Interposition Techniques for Performance Analysis of OpenMP Parallel Applications.
Proceedings of the 14th International Parallel & Distributed Processing Symposium (IPDPS'00), 2000
1999
Thread fork/join techniques for multi-level parallelism exploitation in NUMA multiprocessors.
Proceedings of the 13th international conference on Supercomputing, 1999
Proceedings of the International Conference on Parallel Processing 1999, 1999
1998
Experiences on implementing PARMACS macros to run the SPLASH-2 suite on multiprocessors.
Proceedings of the Sixth Euromicro Workshop on Parallel and Distributed Processing, 1998
Proceedings of the 12th international conference on Supercomputing, 1998
1997
Proceedings of the Languages and Compilers for Parallel Computing, 1997
Proceedings of the 11th International Parallel Processing Symposium (IPPS '97), 1997
1996
Proceedings of the Euro-Par '96 Parallel Processing, 1996
1995
The eXc Model: Scheduler-Activations on Mach 3.0.
Proceedings of the Seventh IASTED/ISMM International Conference on Parallel and Distributed Computing and Systems, 1995