Myunghwan Ryu

According to our database, Myunghwan Ryu authored at least 7 papers between 2011 and 2015.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2015

On-chip interconnect boosting technique by using of 10-nm double gate-all-around (DGAA) transistor.

Jaemin Lee, Myunghwan Ryu, Youngmin Kim

IEICE Electron. Express, 2015

2013

A high resolution and high linearity 45nm CMOS fully digital voltage sensor for low power applications.

Myunghwan Ryu, Youngmin Kim

IEICE Electron. Express, 2013

Trapezoidal approximation for on-current modeling of 45-nm non-rectilinear gate shape.

Myunghwan Ryu, Youngmin Kim

IEICE Electron. Express, 2013

2012

TSV Geometrical Variations and Optimization Metric with Repeaters for 3D IC.

Hung Viet Nguyen, Myunghwan Ryu, Youngmin Kim

IEICE Trans. Electron., 2012

A novel methodology for speeding up IC performance in 32nm FinFET.

Hung Viet Nguyen, Myunghwan Ryu, Youngmin Kim

IEICE Electron. Express, 2012

2011

Diffusion-rounded CMOS for improving both I_on and I_off characteristics.

Myunghwan Ryu, Hung Viet Nguyen, Youngmin Kim

IEICE Electron. Express, 2011

Performance and power analysis of through silicon via based 3D IC integration.

Hung Viet Nguyen, Myunghwan Ryu, Youngmin Kim

Proceedings of the 2011 International Workshop on System Level Interconnect Prediction, 2011