Myung Hoon Sunwoo
Orcid: 0000-0001-6412-5185
According to our database1,
Myung Hoon Sunwoo
authored at least 127 papers
between 1990 and 2024.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 2011, "For contributions to multimedia and communications".
Timeline
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On csauthors.net:
Bibliography
2024
An Automated Cardiac Arrhythmia Classification Network for 45 Arrhythmia Classes Using 12-Lead Electrocardiogram.
IEEE Access, 2024
Efficient Deep Retinal Fundus Image-Based Network for Alzheimer's Disease Diagnosis Using Mobile Device Applications.
IEEE Access, 2024
2023
IEEE Trans. Circuits Syst. II Express Briefs, October, 2023
IEEE Access, 2023
2022
Multilevel Feature Extraction Using Wavelet Attention for Deep Joint Demosaicking and Denoising.
IEEE Access, 2022
Proceedings of the 19th International SoC Design Conference, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022
Live Demonstration: Efficient Deep Learning Algorithm for Alzheimer's Disease Diagnosis using Retinal Images.
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022
Efficient Deep Learning Algorithm for Alzheimer's Disease Diagnosis using Retinal Images.
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022
2021
J. Signal Process. Syst., 2021
J. Signal Process. Syst., 2021
Efficient Partial Sum Architecture and Memory Reduction Method for SC-Flip Polar Decoder.
Proceedings of the 18th International SoC Design Conference, 2021
Proceedings of the 18th International SoC Design Conference, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2020
Proceedings of the International SoC Design Conference, 2020
2019
Low Power AES Using 8-Bit and 32-Bit Datapath Optimization for Small Internet-of-Things (IoT).
J. Signal Process. Syst., 2019
A Fast Mode Decision Algorithm Using Hierarchical and Skip Methods for Intra Prediction in HEVC.
J. Signal Process. Syst., 2019
J. Signal Process. Syst., 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Proceedings of the IEEE International Conference on Artificial Intelligence Circuits and Systems, 2019
2018
Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018
2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the International SoC Design Conference, 2017
2016
IEEE Trans. Circuits Syst. II Express Briefs, 2016
Proceedings of the International SoC Design Conference, 2016
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016
2015
IEEE Trans. Very Large Scale Integr. Syst., 2015
Proceedings of the 2015 IEEE Workshop on Signal Processing Systems, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
2014
IEEE Trans. Circuits Syst. Video Technol., 2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014
Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014
2013
J. Signal Process. Syst., 2013
MESIP: A Configurable and Data Reusable Motion Estimation Specific Instruction-Set Processor.
IEEE Trans. Circuits Syst. Video Technol., 2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Proceedings of the 7th International Conference on Ubiquitous Information Management and Communication, 2013
2012
Guest Editorial - Special Issue on Signal Processing Circuits and Systems for Broadband Communications.
J. Signal Process. Syst., 2012
Erratum to: Three-Parallel Reed-Solomon Decoder Using S-DCME for High-Speed Communications.
J. Signal Process. Syst., 2012
J. Signal Process. Syst., 2012
Low complexity full parallel Multi-Split LDPC decoder reusing sign wire of row processor.
Proceedings of the International SoC Design Conference, 2012
Low complexity FFT/IFFT processor for high-speed OFDM system using efficient multiplier scheduling.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Proceedings of the 6th International Conference on Ubiquitous Information Management and Communication, 2012
Proceedings of the 20th European Signal Processing Conference, 2012
2011
Proceedings of the International SoC Design Conference, 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Novel fractional motion estimation algorithm and architecture using Sub-block Combination.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Integer-pel Motion Estimation specific instructions and their hardware architecture for ASIP.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Proceedings of the 5th International Conference on Ubiquitous Information Management and Communication, 2011
2010
Novel Digital Signal Processing Unit Using New Digital Baseline Wander Corrector for Fast Ethernet.
J. Signal Process. Syst., 2010
An efficient skipping method of H.264/AVC weighted prediction for various illuminating effects.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Proceedings of the 4th International Conference on Ubiquitous Information Management and Communication, 2010
Power efficient column operation-based message-passing schedule for regular ldpc decoder.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010
2009
J. Signal Process. Syst., 2009
Proceedings of the IEEE Workshop on Signal Processing Systems, 2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Simplified sum-product algorithm using piecewise linear function approximation for low complexity LDPC decoding.
Proceedings of the 3rd International Conference on Ubiquitous Information Management and Communication, 2009
Proceedings of the International Conference on Image Processing, 2009
Low complexity synchronizer architecture based on common autocorrelator for Digital Video Broadcasting system.
Proceedings of the 16th International Conference on Digital Signal Processing, 2009
Proceedings of the 16th International Conference on Digital Signal Processing, 2009
2008
J. Signal Process. Syst., 2008
Proceedings of the IEEE Workshop on Signal Processing Systems, 2008
Proceedings of the IEEE Workshop on Signal Processing Systems, 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the 2nd International Conference on Ubiquitous Information Management and Communication, 2008
Efficient frame selection schemes for multi-reference and variable block size Motion Estimation.
Proceedings of the 2008 IEEE International Conference on Multimedia and Expo, 2008
Novel fractional pixel motion estimation algorithm using motion prediction and fast search pattern.
Proceedings of the 2008 IEEE International Conference on Multimedia and Expo, 2008
Hardware efficient frequency estimator based on data-aided algorithm for digital video broadcasting system.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
2007
Proceedings of the IEEE Workshop on Signal Processing Systems, 2007
Proceedings of the IEEE Workshop on Signal Processing Systems, 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Novel Non-linear Inverse Quantization Algorithm and its Architecture for Digital Audio Codecs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
2006
New degree computationless modified euclid algorithm and architecture for Reed-Solomon decoder.
IEEE Trans. Very Large Scale Integr. Syst., 2006
IEICE Trans. Commun., 2006
Proceedings of the IEEE Workshop on Signal Processing Systems, 2006
Efficient Memory Reuse and Sub-Pixel Interpolation Algorithms for ME/MC of H.264/AVC.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2006
Enhanced degree computationless modified Euclid's algorithm for Reed-Solomon decoder.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006
2005
J. VLSI Signal Process., 2005
IEEE Trans. Circuits Syst. I Regul. Pap., 2005
EURASIP J. Adv. Signal Process., 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
2004
J. VLSI Signal Process., 2004
A multislot-interleaved turbo-coded MC-CDMA/TDD uplink system with pre-equalization using polynomial fitting and extension for uplink channel estimation.
Proceedings of the IEEE 15th International Symposium on Personal, 2004
Implementation of application-specific DSP for OFDM systems.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Novel bit manipulation unit for communication digital signal processors.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
2003
J. VLSI Signal Process., 2003
Design of Application-Specific Instructions and Hardware Accelerator for Reed-Solomon Codecs.
EURASIP J. Adv. Signal Process., 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 14th IEEE International Conference on Application-Specific Systems, 2003
2002
Implementation factors of the multi-rate parallel interference canceller for the IMT-2000 3GPP system.
Proceedings of the 55th IEEE Vehicular Technology Conference, 2002
Proceedings of the 55th IEEE Vehicular Technology Conference, 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Design of new DSP instructions and their hardware architecture for the Viterbi decoding algorithm.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
2001
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
1999
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999
1998
J. Parallel Distributed Comput., 1998
Proceedings of the ASP-DAC '98, 1998
Proceedings of the ASP-DAC '98, 1998
1997
Proceedings of the 1997 International Conference on Parallel and Distributed Systems (ICPADS '97), 1997
Proceedings of the 1997 International Conference on Application-Specific Systems, 1997
1996
1995
Design and Implementation of a Parallel Image Processor Chip for a SIMD Array Processor.
Proceedings of the International Conference on Application Specific Array Processors (ASAP'95), 1995
1993
1992
Mach. Vis. Appl., 1992
1990
J. Parallel Distributed Comput., 1990
Proceedings of the 10th IAPR International Conference on Pattern Recognition, 1990
Proceedings of the 10th IAPR International Conference on Pattern Recognition, 1990