Myron Wong

According to our database, Myron Wong authored at least 3 papers between 1998 and 2003.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2003

Cyclone ™: a low-cost, high-performance FPGA.

Paul Leventis, Mark Chan, Michael Chan, David M. Lewis, Behzad Nouban, Giles Powell, Brad Vest, Myron Wong, Renxin Xia, John Costello

Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

1999

A 4.9 ns, 3.3 volt, 512 macrocell, CMOS PLD with hot socket protection and fast in system programming.

Brad Vest, Gwen Liang, Mark Chan, Eric Chun, Mark Fiester, Weiying Ding, Edmond Lau, Guu Lin, Behzad Nouban, Dirk Reese, Mian Smith, Nghia Tran, Stephanie Wong, Michael Woo, Myron Wong, John Costello

Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, 1999

1998

A 6.9 ns, 560 macrocell, in system programmable, CMOS PLD with 3.3-5 volt I/O capability.

Dirk Reese, Eric Chun, Sammy Cheung, Edmond Lau, Michael Chu, Gwen Liang, Nghia Van Tran, Brad Vest, Richard Smolen, Minchang Liang, Seshan Sekariapuram, Behzad Nouban, Myron Wong, John Costello, John Turner

Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998