Myeong-Lyong Ko

According to our database¹, Myeong-Lyong Ko authored at least 4 papers between 2003 and 2006.

Collaborative distances:

Dijkstra number² of six.
Erdős number³ of six.

Timeline

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PhD thesis

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Bibliography

2006

A versatile I/O with robust impedance calibration for various memory interfaces.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005

A new level-up shifter for high speed and wide range interface in ultra deep sub-micron.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004

A new level shifter in ultra deep sub-micron for low to wide range voltage applications.

[BibT_eX]

[DOI]

Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004

2003

A slew-rate controlled output driver using PLL as compensation circuit.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2003

Myeong-Lyong Ko

Timeline

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On csauthors.net:

Bibliography

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