Myeong-Hoon Oh

According to our database, Myeong-Hoon Oh authored at least 19 papers between 2004 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

Design and Implementation of Asynchronous Processor on FPGA.

Ziho Shin, Myeonghoon Oh

IEEE Access, 2022

2021

PCIe Bridge Hardware for Gen-Z Memory System.

Chan-Ho Park, Won-Ok Kwon, Myeong-Hoon Oh, Cheol-Hoon Lee

Proceedings of the International Conference on Electronics, Information, and Communication, 2021

Verification of Interconnect RTL Code for Memory-Centric Computing using UVM.

Hyuk-Je Kwon, Myeong-Hoon Oh, Won-Ok Kwon

Proceedings of the International Conference on Electronics, Information, and Communication, 2021

Performance Evaluation of Fabric-Attached Memory Pool for AI Applications.

Young Woo Kim, Myeong-Hoon Oh

Proceedings of the International Conference on Electronics, Information, and Communication, 2021

2020

Hardware Implementation and Analysis of Gen-Z Protocol for Memory-Centric Architecture.

Seokbin Hong, Wonok Kwon, Myeonghoon Oh

IEEE Access, 2020

Persistent Memory Object Storage and Indexing for Scientific Computing.

Awais Khan, Hyogi Sim, Sudharshan S. Vazhkudai, Jin-Suk Ma, Myeong-Hoon Oh, Youngjae Kim

Proceedings of the IEEE/ACM Workshop on Memory Centric High Performance Computing, 2020

Gen-Z Memory Pool System Architecture.

Wonok Kwon, Chanho Park, Myeonghoon Oh

Proceedings of the International Conference on Information and Communication Technology Convergence, 2020

2019

Appropriate Synchronization Time Allocation for Distributed Heterogeneous Parallel Computing Systems.

Biruk Yirga Nidaw, Myeong-Hoon Oh, Young Woo Kim

KSII Trans. Internet Inf. Syst., 2019

Research on computing structure for large-capacity NVM shared memory pool.

Wonok Kwon, Chanho Park, Hyukjae Kwon, Youngwoo Kim, Myeonghoon Oh

Proceedings of the 2019 International Conference on Information and Communication Technology Convergence, 2019

2017

Design of a clockless MSP430 core using mixed asynchronous design flow.

Ziho Shin, Myeong-Hoon Oh, Jeong-Gun Lee, Hag-Young Kim, Young Woo Kim

IEICE Electron. Express, 2017

2014

Asynchronous Circuit Designs on an FPGA for Targeting a Power/Energy Efficient SoC.

Jeong-Gun Lee, Myeong-Hoon Oh

IEICE Trans. Electron., 2014

2011

472MHz throughput asynchronous FIFO design on a Virtex-5 FPGA device.

Jeong-Gun Lee, Deok-Young Lee, Myeong-Hoon Oh, Young Woong Ko

IEICE Electron. Express, 2011

Fine-grained power gating of datapath using FSM.

Chi-Hoon Shin, Myeong-Hoon Oh, Sung Nam Kim, Seongwoon Kim

Proceedings of the 2nd IEEE International Conference on Networked Embedded Systems for Enterprise Applications, 2011

Design of asynchronous 2-phase ternary encoding protocol using multiple-valued logic.

Myeong-Hoon Oh, Sung Nam Kim, Sungwoon Kim

Proceedings of the International SoC Design Conference, 2011

2010

Functional unit duplication for reducing dynamic power.

Chi-Hoon Shin, Myeong-Hoon Oh, Jae-Woo Sim, Young-Woo Kim, Sung Nam Kim, Seongwoon Kim

IEICE Electron. Express, 2010

2008

Low Static Powered Asynchronous Data Transfer for GALS System.

Myeong-Hoon Oh, Seongwoon Kim

IEICE Trans. Inf. Syst., 2008

2007

Asynchronous Functional Coupling for Low Power Sensor Network Processors.

Delong Shang, Chi-Hoon Shin, Ping Wang, Fei Xia, Albert Koelmans, Myeong-Hoon Oh, Seongwoon Kim, Alexandre Yakovlev

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2007

2005

Low Delay-Power Product Current-Mode Multiple Valued Logic for Delay-Insensitive Data Transfer Mechanism.

Myeong-Hoon Oh, Dong-Soo Har

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005

2004

A Novel Mechanism for Delay-Insensitive Data Transfer Based on Current-Mode Multiple Valued Logic.

Myeong-Hoon Oh, Dong-Soo Har

Proceedings of the Integrated Circuit and System Design, 2004