Mutsuo Hidaka

According to our database1, Mutsuo Hidaka authored at least 11 papers between 1988 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2021
Planarized Nb 4-Layer Fabrication Process for Superconducting Integrated Circuits and Its Fabricated Device Evaluation.
IEICE Trans. Electron., 2021

Fabrication Process for Superconducting Digital Circuits.
IEICE Trans. Electron., 2021

2014
Design and High-Speed Demonstration of Single-Flux-Quantum Bit-Serial Floating-Point Multipliers Using a 10kA/cm<sup>2</sup> Nb Process.
IEICE Trans. Electron., 2014

Nb 9-Layer Fabrication Process for Superconducting Large-Scale SFQ Circuits and Its Process Evaluation.
IEICE Trans. Electron., 2014

2012
Foreword.
IEICE Trans. Electron., 2012

2010
100 GHz Demonstrations Based on the Single-Flux-Quantum Cell Library for the 10 kA/cm<sup>2</sup> Nb Multi-Layer Process.
IEICE Trans. Electron., 2010

2008
Improvements in Fabrication Process for Nb-Based Single Flux Quantum Circuits in Japan.
IEICE Trans. Electron., 2008

Applying Low Power Consumption Superconductive Device Technology to Real-Time Waveform Monitoring for Photonic Network.
Proceedings of the 2008 International Symposium on Applications and the Internet, 2008

Superconductive Single-Flux-Quantum Circuit/System Technology and 40Gb/s Switch System Demonstration.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

1989
570-ps 13-mW Josephson 1-kbit NDRO RAM.
IEEE J. Solid State Circuits, October, 1989

1988
AC-and DC-powered subnanosecond 1-kbit Josephson cache memory design.
IEEE J. Solid State Circuits, August, 1988


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