Mustafa Khairallah
Orcid: 0000-0002-2144-4829
According to our database1,
Mustafa Khairallah
authored at least 39 papers
between 2011 and 2025.
Collaborative distances:
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Bibliography
2025
IACR Cryptol. ePrint Arch., 2025
2024
IACR Trans. Symmetric Cryptol., 2024
IACR Cryptol. ePrint Arch., 2024
Revisiting Leakage-Resilient MACs and Succinctly-Committing AEAD: More Applications of Pseudo-Random Injections.
IACR Cryptol. ePrint Arch., 2024
IACR Cryptol. ePrint Arch., 2024
Fast Parallelizable Misuse-Resistant Authenticated Encryption: Low Latency (Decryption-Fast) SIV.
IACR Cryptol. ePrint Arch., 2024
uKNIT: Breaking Round-alignment for Cipher Design - Featuring uKNIT-BC, an Ultra Low-Latency Block Cipher.
IACR Cryptol. ePrint Arch., 2024
2023
CLRW1<sup>3</sup> is not Secure Beyond the Birthday Bound: Breaking TNT with O(2<sup>n/2</sup>) queries.
IACR Cryptol. ePrint Arch., 2023
Tight Security of TNT and Beyond: Attacks, Proofs and Possibilities for the Cascaded LRW Paradigm.
IACR Cryptol. ePrint Arch., 2023
2022
IACR Trans. Symmetric Cryptol., 2022
IACR Trans. Symmetric Cryptol., 2022
Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2022
2021
IACR Cryptol. ePrint Arch., 2021
Proceedings of the Topics in Cryptology - CT-RSA 2021, 2021
2020
IACR Trans. Symmetric Cryptol., 2020
IEEE Trans. Circuits Syst., 2020
Preliminary Hardware Benchmarking of a Group of Round 2 NIST Lightweight AEAD Candidates.
IACR Cryptol. ePrint Arch., 2020
IACR Cryptol. ePrint Arch., 2020
2019
IACR Trans. Symmetric Cryptol., 2019
IACR Cryptol. ePrint Arch., 2019
On Misuse of Nonce-Misuse Resistance: Adapting Differential Fault Attacks on (few) CAESAR Winners.
IACR Cryptol. ePrint Arch., 2019
IACR Cryptol. ePrint Arch., 2019
IACR Cryptol. ePrint Arch., 2019
Proceedings of the 31st International Conference on Microelectronics, 2019
Proceedings of the 28th IEEE Asian Test Symposium, 2019
2018
IACR Cryptol. ePrint Arch., 2018
Protecting Block Ciphers against Differential Fault Attacks without Re-keying (Extended Version).
IACR Cryptol. ePrint Arch., 2018
Crack me if you can: hardware acceleration bridging the gap between practical and theoretical cryptanalysis?: a Survey.
Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018
Proceedings of the 2018 IEEE International Symposium on Hardware Oriented Security and Trust, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
2017
A Comprehensive Performance Analysis of Hardware Implementations of CAESAR Candidates.
IACR Cryptol. ePrint Arch., 2017
Looting the LUTs : FPGA Optimization of AES and AES-like Ciphers for Authenticated Encryption.
IACR Cryptol. ePrint Arch., 2017
2016
Tile-Based Modular Architecture for Accelerating Homomorphic Function Evaluation on FPGA.
IACR Cryptol. ePrint Arch., 2016
2015
New polynomial basis versatile multiplier over GF(2<sup>m</sup>) for low-power on-chip crypto-systems.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
2011
Proceedings of the 6th International Conference for Internet Technology and Secured Transactions, 2011