Muriel de Potter de ten Broeck

According to our database, Muriel de Potter de ten Broeck authored at least 5 papers between 2005 and 2015.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2015

Active-lite interposer for 2.5 & 3D integration.

Geert Hellings, Mirko Scholz, Mikael Detalle, Dimitrios Velenis, Muriel de Potter de ten Broeck, C. Roda Neve, Y. Li, Stefaan Van Huylenbroeck, Shih-Hung Chen, Erik Jan Marinissen, Antonio La Manna, Geert Van der Plas, Dimitri Linten, Eric Beyne, Aaron Thean

Proceedings of the Symposium on VLSI Circuits, 2015

2011

Design Issues and Considerations for Low-Cost 3-D TSV IC Technology.

Geert Van der Plas, Paresh Limaye, Igor Loi, Abdelkarim Mercha, Herman Oprins, Cristina Torregiani, Steven Thijs, Dimitri Linten, Michele Stucchi, Guruprasad Katti, Dimitrios Velenis, Vladimir Cherman, Bart Vandevelde, Veerle Simons, Ingrid De Wolf, Riet Labie, Dan Perry, Stephane Bronckers, Nikolaos Minas, Miro Cupac, Wouter Ruythooren, Jan Van Olmen, Alain Phommahaxay, Muriel de Potter de ten Broeck, Ann Opdebeeck, Michal Rakowski, Bart De Wachter, Morin Dehan, Marc Nelis, Rahul Agarwal, Antonio Pullini, Federico Angiolini, Luca Benini, Wim Dehaene, Youssef Travaly, Eric Beyne, Paul Marchal

IEEE J. Solid State Circuits, 2011

2010

Design issues and considerations for low-cost 3D TSV IC technology.

Geert Van der Plas, Paresh Limaye, Abdelkarim Mercha, Herman Oprins, Cristina Torregiani, Steven Thijs, Dimitri Linten, Michele Stucchi, Guruprasad Katti, Dimitrios Velenis, Domae Shinichi, Vladimir Cherman, Bart Vandevelde, Veerle Simons, Ingrid De Wolf, Riet Labie, Dan Perry, Stephane Bronckers, Nikolaos Minas, Miro Cupac, Wouter Ruythooren, Jan Van Olmen, Alain Phommahaxay, Muriel de Potter de ten Broeck, Ann Opdebeeck, Michal Rakowski, Bart De Wachter, Morin Dehan, Marc Nelis, Rahul Agarwal, Wim Dehaene, Youssef Travaly, Pol Marchal, Eric Beyne

Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2007

Optimization of HfSiON using a design of experiment (DOE) approach on 0.45 V V_t Ni-FUSI CMOS transistors.

A. Rothschild, R. Mitsuhashi, Christoph Kerner, X. Shi, J. L. Everaert, L. Date, Thierry Conard, Olivier Richard, C. Vrancken, R. Verbeeck, Anabela Veloso, A. Lauwers, Muriel de Potter de ten Broeck, I. Debusschere, M. Jurczak, M. Niwa, Philippe Absil, S. Biesemans

Microelectron. Reliab., 2007

2005

Optimization of low temperature silicon nitride processes for improvement of device performance.

E. Sleeckx, Marc Schaekers, X. Shi, E. Kunnen, B. Degroote, M. Jurczak, Muriel de Potter de ten Broeck, E. Augendre

Microelectron. Reliab., 2005