Mukund Sivaraman

According to our database1, Mukund Sivaraman authored at least 12 papers between 1994 and 2002.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2002
PICO-NPA: High-Level Synthesis of Nonprogrammable Hardware Accelerators.
J. VLSI Signal Process., 2002

PICO: Automatically Designing Custom Computers.
Computer, 2002

Cycle-time aware architecture synthesis of custom hardware accelerators.
Proceedings of the International Conference on Compilers, 2002

2001
Path delay fault diagnosis and coverage-a metric and an estimationtechnique.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001

2000
Primitive path delay faults: identification and their use in timinganalysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000

1997
Primitive Path Delay Fault Identification.
Proceedings of the 10th International Conference on VLSI Design (VLSI Design 1997), 1997

Timing analysis based on primitive path delay fault identification.
Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

1996
A diagnosability metric for parametric path delay faults.
Proceedings of the 14th IEEE VLSI Test Symposium (VTS'96), April 28, 1996

Diagnosis of parametric path delay faults.
Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996

Delay fault coverage: a realistic metric and an estimation technique for distributed path delay faults.
Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996

1995
Test Vector Generation for Parametric Path Delay Faults.
Proceedings of the Proceedings IEEE International Test Conference 1995, 1995

1994
Towards Incorporating Device Parameter Variations in Timing Analysis.
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994


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