Muhtasim Alam Chowdhury

Orcid: 0009-0008-2160-5689

According to our database1, Muhtasim Alam Chowdhury authored at least 7 papers between 2023 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Optimized and Automated Secure IC Design Flow: A Defense-in-Depth Approach.
IEEE Trans. Circuits Syst. I Regul. Pap., May, 2024

Automated Hardware Logic Obfuscation Framework Using GPT.
CoRR, 2024

Sensitivity Analysis of SOT-MTJs to Manufacturing Process Variation: A Hardware Security Perspective.
Proceedings of the 25th International Symposium on Quality Electronic Design, 2024

Securing On-Chip Learning: Navigating Vulnerabilities and Potential Safeguards in Spiking Neural Network Architectures.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

Educational Tool-spaces for Convolutional Neural Network FPGA Design Space Exploration Using High-Level Synthesis.
Proceedings of the Great Lakes Symposium on VLSI 2024, 2024

2023
HW-V2W-Map: Hardware Vulnerability to Weakness Mapping Framework for Root Cause Analysis with GPT-assisted Mitigation Suggestion.
CoRR, 2023

A 60 GHz and 2.08 mW Active Quasi-Circulator in 22 nm FDSOI Technology.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023


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