Muhsen Owaida

According to our database1, Muhsen Owaida authored at least 26 papers between 2009 and 2020.

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Bibliography

2020
Making Search Engines Faster by Lowering the Cost of Querying Business Rules Through FPGAs.
Proceedings of the 2020 International Conference on Management of Data, 2020

2019
Distributed Inference over Decision Tree Ensembles on Clusters of FPGAs.
ACM Trans. Reconfigurable Technol. Syst., 2019

Lowering the Latency of Data Processing Pipelines Through FPGA based Hardware Acceleration.
Proc. VLDB Endow., 2019

doppioDB 1.0: Machine Learning inside a Relational Engine.
IEEE Data Eng. Bull., 2019

Is advance knowledge of flow sizes a plausible assumption?
Proceedings of the 16th USENIX Symposium on Networked Systems Design and Implementation, 2019

2018
Application Partitioning on FPGA Clusters: Inference over Decision Tree Ensembles.
Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

Network Scheduling in the Dark.
Proceedings of the ACM Symposium on Cloud Computing, 2018

Progressive Generation of Canonical Irredundant Sums of Products Using a SAT Solver.
Proceedings of the Advanced Logic Synthesis, 2018

2017
doppioDB: A Hardware Accelerated Database.
Proceedings of the 2017 ACM International Conference on Management of Data, 2017

Accelerating Pattern Matching Queries in Hybrid CPU-FPGA Architectures.
Proceedings of the 2017 ACM International Conference on Management of Data, 2017

Scalable inference of decision tree ensembles: Flexible design for CPU-FPGA platforms.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

Centaur: A Framework for Hybrid CPU-FPGA Databases.
Proceedings of the 25th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2017

2016
Off-chip bus power minimization using serialization with cache-based encoding.
Microelectron. J., 2016

FPRESSO: Enabling Express Transistor-Level Exploration of FPGA Architectures.
Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016

2015
Enhancing Design Space Exploration by Extending CPU/GPU Specifications onto FPGAs.
ACM Trans. Embed. Comput. Syst., 2015

Exploring Automatically Generated Platforms in High Performance FPGAs.
Proceedings of the Parallel Computing: On the Road to Exascale, 2015

Improved carry chain mapping for the VTR flow.
Proceedings of the 2015 International Conference on Field Programmable Technology, 2015

Automatic support for multi-module parallelism from computational patterns.
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

2014
A Grammar Induction Method for Clustering of Operations in Complex FPGA Designs.
Proceedings of the 22nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2014

On the characterization of OpenCL dwarfs on fixed and reconfigurable platforms.
Proceedings of the IEEE 25th International Conference on Application-Specific Systems, 2014

2013
On the Portability of the OpenCL Dwarfs on Fixed and Reconfigurable Parallel Platforms.
Proceedings of the 19th IEEE International Conference on Parallel and Distributed Systems, 2013

2012
Shortening Design Time through Multiplatform Simulations with a Portable OpenCL Golden-model: The LDPC Decoder Case.
Proceedings of the 2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, 2012

2011
Massively parallel programming models used as hardware description languages: The OpenCL case.
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

Synthesis of Platform Architectures from OpenCL Programs.
Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011

Implementation and Performance Comparison of the Motion Compensation Kernel of the AVS Video Decoder on FPGA, GPU and Multicore Processors.
Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011

2009
A high performance and low power hardware architecture for the transform & quantization stages in H.264.
Proceedings of the 2009 IEEE International Conference on Multimedia and Expo, 2009


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