Muhammad Yasin

Orcid: 0000-0001-9475-2796

According to our database1, Muhammad Yasin authored at least 47 papers between 2003 and 2025.

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Bibliography

2025
JamBIT: RL-based framework for disrupting adversarial information in battlefields.
Ad Hoc Networks, 2025

2024
CAC 2.0: A Corrupt and Correct Logic Locking Technique Resilient to Structural Analysis Attacks.
Proceedings of the 25th IEEE Latin American Test Symposium, 2024

KRATT: QBF-Assisted Removal and Structural Analysis Attack Against Logic Locking.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

2021
ScanSAT: Unlocking Static and Dynamic Scan Obfuscation.
IEEE Trans. Emerg. Top. Comput., 2021

Does logic locking work with EDA tools?
Proceedings of the 30th USENIX Security Symposium, 2021

2020
Development of blind algorithm with automatic gain control.
Wirel. Networks, 2020

Removal Attacks on Logic Locking and Camouflaging Techniques.
IEEE Trans. Emerg. Top. Comput., 2020

Logic Locking With Provable Security Against Power Analysis Attacks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Keynote: A Disquisition on Logic Locking.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Benchmarking at the Frontier of Hardware Security: Lessons from Logic Locking.
CoRR, 2020

Multi-Objective Strategies for Stripped-Functionality Logic Locking.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Trustworthy Hardware Design: Combinational Logic Locking Techniques
Springer, ISBN: 978-3-030-15333-5, 2020

2019
ScanSAT: Unlocking Obfuscated Scan Chains.
IACR Cryptol. ePrint Arch., 2019

Special Session: Countering IP Security threats in Supply chain.
Proceedings of the 37th IEEE VLSI Test Symposium, 2019

Logic Locking of Boolean Circuits: Provable Hardware-Based Obfuscation from a Tamper-Proof Memory.
Proceedings of the Innovative Security Solutions for Information Technology and Communications, 2019

Functional Reverse Engineering on SAT-Attack Resilient Logic Locking.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

SFLL-HLS: Stripped-Functionality Logic Locking Meets High-Level Synthesis.
Proceedings of the International Conference on Computer-Aided Design, 2019

Revisiting Logic Locking for Reversible Computing.
Proceedings of the 24th IEEE European Test Symposium, 2019

MixLock: Securing Mixed-Signal Circuits via Logic Locking.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018
A Comparative Study on Frequent Link Disconnection problems in VANETs.
EAI Endorsed Trans. Energy Web, 2018

ATPG-based cost-effective, secure logic locking.
Proceedings of the 36th IEEE VLSI Test Symposium, 2018

Towards Provably Secure Logic Locking for Hardening Hardware Security Dissertation Summary: IEEE TTTC E.J. McCluskey Doctoral Thesis Award Competition.
Proceedings of the IEEE International Test Conference, 2018

2017
Testing the Trustworthiness of IC Testing: An Oracle-Less Attack on IC Camouflaging.
IEEE Trans. Inf. Forensics Secur., 2017

Ultra-Low Power, Secure IoT Platform for Predicting Cardiovascular Diseases.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

Effect of micro/nano-SiO$_{2}$ on mechanical, thermal, and electrical properties of silicone rubber, epoxy, and EPDM composites for outdoor electrical insulations.
Turkish J. Electr. Eng. Comput. Sci., 2017

Evolution of logic locking.
Proceedings of the 2017 IFIP/IEEE International Conference on Very Large Scale Integration, 2017

TTLock: Tenacious and traceless logic locking.
Proceedings of the 2017 IEEE International Symposium on Hardware Oriented Security and Trust, 2017

What to Lock?: Functional and Parametric Locking.
Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017

Provably-Secure Logic Locking: From Theory To Practice.
Proceedings of the 2017 ACM SIGSAC Conference on Computer and Communications Security, 2017

2016
On Improving the Security of Logic Locking.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

Forensic artifacts modeling for social media client applications to enhance investigatory learning mechanisms.
J. Intell. Fuzzy Syst., 2016

Security Analysis of Anti-SAT.
IACR Cryptol. ePrint Arch., 2016

CamoPerturb: secure IC camouflaging for minterm protection.
Proceedings of the 35th International Conference on Computer-Aided Design, 2016

SARLock: SAT attack resistant logic locking.
Proceedings of the 2016 IEEE International Symposium on Hardware Oriented Security and Trust, 2016

Activation of logic encrypted chips: Pre-test or post-test?
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015
A granular approach for user-centric network analysis to identify digital evidence.
Peer-to-Peer Netw. Appl., 2015

Transforming between logic locking and IC camouflaging.
Proceedings of the 10th International Design & Test Symposium, 2015

Security analysis of logic encryption against the most effective side-channel attack: DPA.
Proceedings of the 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2015

2014
Correlating messages from multiple IM networks to identify digital forensic artifacts.
Electron. Commer. Res., 2014

Unified, ultra compact, quadratic power proxies for multi-core processors.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013
DigLA - A Digsby log analysis tool to identify forensic artifacts.
Digit. Investig., 2013

Ultra compact, quadratic power proxies for multi-core processors.
Proceedings of the 20th IEEE International Conference on Electronics, 2013

2012
Forensic Analysis of Digsby Log Data to Trace Suspected User Activities.
Proceedings of the Information Technology Convergence, Secure and Trust Computing, and Data Management, 2012

2010
Analysis of Internet Download Manager for collection of digital forensic artefacts.
Digit. Investig., 2010

2009
Analysis of Download Accelerator Plus (DAP) for Forensic Artefacts.
Proceedings of the IMF 2009, 2009

Analysis of Free Download Manager for Forensic Artefacts.
Proceedings of the Digital Forensics and Cyber Crime - First International ICST Conference, 2009

2003
On-line laboratories for image and two-dimensional signal processing using 2D J-DSP.
Proceedings of the 2003 IEEE International Conference on Acoustics, 2003


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