Muhammad Adeel Tajammul
According to our database1,
Muhammad Adeel Tajammul
authored at least 14 papers
between 2011 and 2019.
Collaborative distances:
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Bibliography
2019
J. Signal Process. Syst., 2019
2016
IEEE Trans. Very Large Scale Integr. Syst., 2016
TransMem: A memory architecture to support dynamic remapping and parallelism in low power high performance CGRAs.
Proceedings of the 26th International Workshop on Power and Timing Modeling, 2016
2015
DyMeP: An Infrastructure to Support Dynamic Memory Binding for Runtime Mapping in CGRAs.
Proceedings of the 28th International Conference on VLSI Design, 2015
Digital system modeling and synthesis as an introduction to Computer Systems Engineering.
Proceedings of the 2015 IEEE International Conference on Microelectronics Systems Education, 2015
Proceedings of the 2015 IEEE International Conference on Microelectronics Systems Education, 2015
2014
Parallel distributed scalable runtime address generation scheme for a coarse grain reconfigurable computation and storage fabric.
Microprocess. Microsystems, 2014
Proceedings of the 22nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2014
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014
2013
Energy-aware-task-parallelism for efficient dynamic voltage, and frequency scaling, in CGRAs.
Proceedings of the 2013 International Conference on Embedded Computer Systems: Architectures, 2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Proceedings of the 24th International Conference on Application-Specific Systems, 2013
2012
Proceedings of the IEEE 6th International Symposium on Embedded Multicore/Manycore SoCs, 2012
2011
NoC Based Distributed Partitionable Memory System for a Coarse Grain Reconfigurable Architecture.
Proceedings of the VLSI Design 2011: 24th International Conference on VLSI Design, 2011