Muhammad Abrar Akram

Orcid: 0000-0001-7574-8695

According to our database1, Muhammad Abrar Akram authored at least 14 papers between 2019 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
A 65-nm duty-cycle corrector achieving 10% to 90% duty-correction range with 0.86% duty-cycle error.
Microelectron. J., 2024

3.6 An Amplifier-Less CMOS Potentiostat IC Consuming 3.7nW Power all over 129.5dB Dynamic Range for Electrochemical Biosensing.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

An Analog-assisted Fast-transient Digital LDO with a Charge-pump-based Fine Loop Achieving 0.14-mV Output Voltage Ripples.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

A High-throughput Impedance Measurement IC with Baseline-Canceling Peak Detector.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

A Tri-loop Fast-transient Digital LDO with Adaptive-gain Control and Fine-loop Freezer.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

A High-throughput Impedance Measurement IC Using Synchronous Cyclic Integration Technique.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

A Hybrid High-voltage Regulating Charge Pump for Electrokinetic Concentration.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023
A Differential Rectifier With ${V}_{TH}$ Compensation for High-Frequency RF Inputs.
IEEE Trans. Biomed. Circuits Syst., August, 2023

2022
A 433.92-MHz CMOS Rectifier with Dynamic VTH-reduction for Wireless Biomedical Implants.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2022

2021
Capacitor-Less Dual-Mode All-Digital LDO With ΔΣ-Modulation-Based Ripple Reduction.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

Power Delivery Networks for Embedded Mobile SoCs: Architectural Advancements and Design Challenges.
IEEE Access, 2021

2020
Architectural Advancement of Digital Low-Dropout Regulators.
IEEE Access, 2020

A 0.012mm<sup>2</sup>, 0.96-mW All-Digital Multiplying Delay-Locked Loop Based Frequency Synthesizer for GPS-L4 band.
Proceedings of the 2020 IEEE International Conference on Consumer Electronics (ICCE), 2020

2019
Capacitorless Self-Clocked All-Digital Low-Dropout Regulator.
IEEE J. Solid State Circuits, 2019


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