Mu-Chun Wang
Orcid: 0000-0002-4605-0658
According to our database1,
Mu-Chun Wang
authored at least 15 papers
between 2001 and 2022.
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Bibliography
2022
Analyzing and Simulating User Utterance Reformulation in Conversational Recommender Systems.
Proceedings of the SIGIR '22: The 45th International ACM SIGIR Conference on Research and Development in Information Retrieval, Madrid, Spain, July 11, 2022
Proceedings of the 60th Annual Meeting of the Association for Computational Linguistics (Volume 1: Long Papers), 2022
2021
Proceedings of the SIGIR '21: The 44th International ACM SIGIR Conference on Research and Development in Information Retrieval, 2021
2020
Proceedings of the 3rd IEEE International Conference on Knowledge Innovation and Invention, 2020
Proceedings of the 3rd IEEE International Conference on Knowledge Innovation and Invention, 2020
Patterns of Exposing Integrity of 28nm-node High-k Gate Dielectric on p-substrate with Nitridation Treatments.
Proceedings of the 3rd IEEE International Conference on Knowledge Innovation and Invention, 2020
Proceedings of the 3rd IEEE International Conference on Knowledge Innovation and Invention, 2020
2018
Electrical and Physical Characteristics of WO<sub>3</sub>/Ag/WO<sub>3</sub> Sandwich Structure Fabricated with Magnetic-Control Sputtering Metrology †.
Sensors, 2018
Microelectron. Reliab., 2018
2015
Heat stress exposing performance of deep-nano HK/MG nMOSFETs using DPN or PDA treatment.
Microelectron. Reliab., 2015
Leakage current mechanism and effect of Y<sub>2</sub>O<sub>3</sub> doped with Zr high-K gate dielectrics.
Microelectron. Reliab., 2015
2010
Promoting of charged-device model/electrostatic discharge immunity in the dicing saw process.
Microelectron. Reliab., 2010
2009
Trend transformation of drain-current degradation under drain-avalanche hot-carrier stress for CLC n-TFTs.
Microelectron. Reliab., 2009
2005
Proceedings of the Embedded and Ubiquitous Computing - EUC 2005 Workshops, 2005
2001
Compact Layout Rule Extraction for Latchup Prevention in a 0.25-?m Shallow-Trench-Isolation Silicided Bulk CMOS Process.
Proceedings of the 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 2001