Mrinal Bose
According to our database1,
Mrinal Bose
authored at least 9 papers
between 1999 and 2009.
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Bibliography
2009
Simulation of a Heterogeneous System at Multiple Levels of Abstraction Using Rendezvous Based Modeling.
Proceedings of the 10th International Workshop on Microprocessor Test and Verification, 2009
Proceedings of the 2009 IEEE International Test Conference, 2009
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2009
An abstraction mechanism to maximize stimulus portability across RTL, FPGA, software models and silicon of SoCs.
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009
Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, 2009
2003
Proceedings of the Fourth International Workshop on Microprocessor Test and Verification, 2003
2001
Automatic Bias Generation Using Pipeline Instruction State Coverage for Biased Random Instruction Generation.
Proceedings of the 7th IEEE International On-Line Testing Workshop (IOLTW 2001), 2001
A genetic approach to automatic bias generation for biased random instruction generation.
Proceedings of the 2001 Congress on Evolutionary Computation, 2001
1999
Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999