Mrigank Sharad

According to our database, Mrigank Sharad authored at least 54 papers between 2011 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Approximate ADCs for In-Memory Computing.

Arkapravo Ghosh, Hemkar Reddy Sadana, Mukut Debnath, Panthadip Maji, Shubham Negi, Sumeet Gupta, Mrigank Sharad, Kaushik Roy

CoRR, 2024

2022

Acoustic scene analysis using analog spiking neural network.

Anand Kumar Mukhopadhyay, Naligala Moses Prabhakar, Divya Lakshmi Duggisetty, Indrajit Chakrabarti, Mrigank Sharad

Neuromorph. Comput. Eng., December, 2022

2021

Power-efficient Spike Sorting Scheme Using Analog Spiking Neural Network Classifier.

Anand Kumar Mukhopadhyay, Atul Sharma, Indrajit Chakrabarti, Arindam Basu, Mrigank Sharad

ACM J. Emerg. Technol. Comput. Syst., 2021

2019

An Adaptive Low-Complexity Abnormality Detection Scheme for Wearable Ultrasonography.

Arvind Srivastav, Keerthana Bhogi, Soumyajit Mandal, Mrigank Sharad

IEEE Trans. Circuits Syst. II Express Briefs, 2019

Intelligent Wireless Sensor Nodes for Human Footstep Sound Classification for Security Application.

Anand Kumar Mukhopadhyay, Naligala Moses Prabhakar, Divya Lakshmi Duggisetty, Indrajit Chakrabarti, Mrigank Sharad

CoRR, 2019

Adaptive Multi-bit SRAM Topology Based Analog PUF.

Sudarshan Sharma, Dhruv Thapar, Nikhil Bhelave, Mrigank Sharad

CoRR, 2019

Current Mode Neuron for the Memristor based synapse.

Harshit Roy, Mrigank Sharad

CoRR, 2019

Adaptive Fractional Open Circuit Voltage Method for Maximum Power Point Tracking in a Photovoltaic Panel.

Shubham Negi, Ashis Maity, Amit Patra, Mrigank Sharad

Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

An Area Effective Programmable Front-end Amplifier for Neural Signal Acquisition.

Gopabandhu Hota, Hardik Agrawal, Mrigank Sharad

Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

Radiation Hardened High-Speed LVDS compliant Transceiver.

Niraj Kumar Jha, Dishank Yadav, Anuj Maheshwari, Mrigank Sharad

Proceedings of the International Conference on Electronics, Communications and Computers, 2019

2018

Power efficient Spiking Neural Network Classifier based on memristive crossbar network for spike sorting application.

Anand Kumar Mukhopadhyay, Indrajit Chakrabarti, Arindam Basu, Mrigank Sharad

CoRR, 2018

Classification of Hand Movements by Surface Myoelectric Signal Using Artificial-Spiking Neural Network Model.

Anand Kumar Mukhopadhyay, Indrajit Chakrabarti, Mrigank Sharad

Proceedings of the 2018 IEEE SENSORS, New Delhi, India, October 28-31, 2018, 2018

2017

Ultra Low Power Sensor Node for Security Applications, Facilitated by Algorithm-Architecture Co-design.

Saransh Sharma, Avilash Mukherjee, Abhishek Dongre, Mrigank Sharad

Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 2017

Digitally assisted analog processing unit for MPG based wearable device.

Himanshu Chaudhary, Sangamesh Kodge, Mrigank Sharad

Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

Low Power Implantable Spike Sorting Scheme Based on Neuromorphic Classifier with Supervised Training Engine.

Rakshit Pathak, Saurav Dash, Anand Kumar Mukhopadhyay, Arindam Basu, Mrigank Sharad

Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

Low Power Image Acquisition Scheme Using On-Pixel Event Driven Halftoning.

Sangamesh Kodge, Himanshu Chaudhary, Mrigank Sharad

Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

Design Optimization of DSP for Wearable Biomedical Device.

Mannem Naga Sasikanth, Sashank Gambhira, Mrigank Sharad

Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2017

STT-MRAM for Low Power Access for Read-Intensive Parallel Deep-Learning Architectures.

Saranyu Chattopadhyay, Kaustav Brahma, Arkaprova Ray, Mrigank Sharad

Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2017

Single chip self-tunable N-input N-output PID control system with integrated analog front-end for miniature robotics.

Anindya Shankar Bhandari, Arjun Chaudhuri, Swarnabha Roy, Shubham Negi, Mrigank Sharad

Proceedings of the 14th IEEE International Conference on Networking, Sensing and Control, 2017

Real-time digitized neural-spike storage scheme in multiple channels for biomedical applications.

Anand Kumar Mukhopadhyay, Indrajit Chakrabarti, Mrigank Sharad

Proceedings of the 2017 Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2017

2016

Hierarchical Temporal Memory Based on Spin-Neurons and Resistive Memory for Energy-Efficient Brain-Inspired Computing.

Deliang Fan, Mrigank Sharad, Abhronil Sengupta, Kaushik Roy

IEEE Trans. Neural Networks Learn. Syst., 2016

Cache Design with Domain Wall Memory.

Rangharajan Venkatesan, Vivek Joy Kozhikkottu, Mrigank Sharad, Charles Augustine, Arijit Raychowdhury, Kaushik Roy, Anand Raghunathan

IEEE Trans. Computers, 2016

Single Chip Self-Tunable N-Input N-Output PID Control System with Integrated Analog Front-end for Miniature Robotics.

Anindya Shankar Bhandari, Arjun Chaudhuri, Mrigank Sharad

CoRR, 2016

Digital LDO with Time-Interleaved Comparators for Fast Response and Low Ripple.

Sohail Ahasan, Saurav Maji, Kaushik Roy, Mrigank Sharad

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

Variation Aware Performance Analysis of TFETs for Low-Voltage Computing.

Vikash Sehwag, Saurav Maji, Mrigank Sharad

Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2016

2015

Energy-Efficient All-Spin Cache Hierarchy Using Shift-Based Writes and Multilevel Storage.

Rangharajan Venkatesan, Mrigank Sharad, Kaushik Roy, Anand Raghunathan

ACM J. Emerg. Technol. Comput. Syst., 2015

Exploring Spin Transfer Torque Devices for Unconventional Computing.

Kaushik Roy, Deliang Fan, Xuanyao Fong, Yusung Kim, Mrigank Sharad, Somnath Paul, Subho Chatterjee, Swarup Bhunia, Saibal Mukhopadhyay

IEEE J. Emerg. Sel. Topics Circuits Syst., 2015

High Sensitivity Biosensor using Injection Locked Spin Torque Nano-Oscillators.

Tathagata Srimani, Bibhas Manna, Anand Kumar Mukhopadhyay, Kaushik Roy, Mrigank Sharad

CoRR, 2015

Energy Efficient and High Performance Current-Mode Neural Network Circuit using Memristors and Digitally Assisted Analog CMOS Neurons.

Aranya Goswamy, Sagar Kumashi, Vikash Sehwag, Siddharth Singh, Manny Jain, Kaushik Roy, Mrigank Sharad

CoRR, 2015

2014

Energy efficient hybrid computing systems using spin devices

Mrigank Sharad

PhD thesis, 2014

Design and Synthesis of Ultra Low Energy Spin-Memristor Threshold Logic.

Deliang Fan, Mrigank Sharad, Kaushik Roy

CoRR, 2014

Computing with Spin-Transfer-Torque Devices: Prospects and Perspectives.

Kaushik Roy, Mrigank Sharad, Deliang Fan, Karthik Yogendra

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014

SPINDLE: SPINtronic deep learning engine for large-scale neuromorphic computing.

Shankar Ganesh Ramasubramanian, Rangharajan Venkatesan, Mrigank Sharad, Kaushik Roy, Anand Raghunathan

Proceedings of the International Symposium on Low Power Electronics and Design, 2014

Brain-inspired computing with spin torque devices.

Kaushik Roy, Mrigank Sharad, Deliang Fan, Karthik Yogendra

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013

Spintronic Switches for Ultra Low Energy On-Chip and Inter-Chip Current-Mode Interconnects

Mrigank Sharad, Kaushik Roy

CoRR, 2013

Spin Neurons: A Possible Path to Energy-Efficient Neuromorphic Computers.

Mrigank Sharad, Deliang Fan, Kaushik Roy

CoRR, 2013

Ultra-low Energy, High-Performance Dynamic Resistive Threshold Logic.

Mrigank Sharad, Deliang Fan, Kaushik Roy

CoRR, 2013

Ultra-low Energy, High Performance and Programmable Magnetic Threshold Logic.

Mrigank Sharad, Deliang Fan, Kaushik Roy

CoRR, 2013

Exploring Boolean and Non-Boolean Computing Applications of Spin Torque Devices.

Kaushik Roy, Mrigank Sharad, Deliang Fan, Karthik Yogendra

CoRR, 2013

Energy efficient computing using coupled Dual-Pillar Spin Torque Nano Oscillators.

Mrigank Sharad, Karthik Yogendra, Kaushik Roy

Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2013

Reading spin-torque memory with spin-torque sensors.

Mrigank Sharad, Rangharajan Venkatesan, Xuanyao Fong, Anand Raghunathan, Kaushik Roy

Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2013

Design of ultra high density and low power computational blocks using nano-magnets.

Mrigank Sharad, Karthik Yogendra, Kon-Woo Kwon, Kaushik Roy

Proceedings of the International Symposium on Quality Electronic Design, 2013

Low power and compact mixed-mode signal processing hardware using spin-neurons.

Mrigank Sharad, Deliang Fan, Kaushik Roy

Proceedings of the International Symposium on Quality Electronic Design, 2013

Multi-level magnetic RAM using domain wall shift for energy-efficient, high-density caches.

Mrigank Sharad, Rangharajan Venkatesan, Anand Raghunathan, Kaushik Roy

Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013

Beyond charge-based computation: Boolean and non-Boolean computing with spin torque devices.

Kaushik Roy, Mrigank Sharad, Deliang Fan, Karthik Yogendra

Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013

Exploring Boolean and non-Boolean computing with spin torque devices.

Kaushik Roy, Mrigank Sharad, Deliang Fan, Karthik Yogendra

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

DWM-TAPESTRI - an energy efficient all-spin cache using domain wall shift based writes.

Rangharajan Venkatesan, Mrigank Sharad, Kaushik Roy, Anand Raghunathan

Proceedings of the Design, Automation and Test in Europe, 2013

Ultra low power associative computing with spin neurons and resistive crossbar memory.

Mrigank Sharad, Deliang Fan, Kaushik Roy

Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2012

Low-Power Architecture for Epileptic Seizure Detection Based on Reduced Complexity DWT.

Mrigank Sharad, Sumeet Kumar Gupta, Shriram Raghunathan, Pedro P. Irazoqui, Kaushik Roy

ACM J. Emerg. Technol. Comput. Syst., 2012

Proposal For Neuromorphic Hardware Using Spin Devices

Mrigank Sharad, Charles Augustine, Georgios Panagopoulos, Kaushik Roy

CoRR, 2012

Ultra low energy analog image processing using spin based neurons.

Mrigank Sharad, Charles Augustine, Georgios Panagopoulos, Kaushik Roy

Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures, 2012

Spin based neuron-synapse module for ultra low power programmable computational networks.

Mrigank Sharad, Charles Augustine, Georgios Panagopoulos, Kaushik Roy

Proceedings of the 2012 International Joint Conference on Neural Networks (IJCNN), 2012

Cognitive computing with spin-based neural networks.

Mrigank Sharad, Charles Augustine, Georgios Panagopoulos, Kaushik Roy

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011

A New Double Data Rate(DDR) Dual-Mode Duobinary Transmitter Architecture.

Mrigank Sharad, Vijaya Sankara Rao Pasupureddi, Pradip Mandal

Proceedings of the VLSI Design 2011: 24th International Conference on VLSI Design, 2011