Moty Mehalel

According to our database, Moty Mehalel authored at least 5 papers between 2007 and 2013.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2013

An Energy Efficient 32-nm 20-MB Shared On-Die L3 Cache for Intel® Xeon® Processor E5 Family.

Min Huang, Moty Mehalel, Ramesh Arvapalli, Songnian He

IEEE J. Solid State Circuits, 2013

2012

A Fully Integrated Multi-CPU, Processor Graphics, and Memory Controller 32-nm Processor.

Marcelo Yuffe, Moty Mehalel, Ernest Knoll, Joseph Shor, Tsvika Kurts, Eran Altshuler, Eyal Fayneh, Kosta Luria, Michael Zelikson

IEEE J. Solid State Circuits, 2012

An energy efficient 32nm 20 MB L3 cache for Intel^® Xeon^® processor E5 family.

Min Huang, Moty Mehalel, Ramesh Arvapalli, Songnian He

Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2011

A fully integrated multi-CPU, GPU and memory controller 32nm processor.

Marcelo Yuffe, Ernest Knoll, Moty Mehalel, Joseph Shor, Tsvika Kurts

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2007

The Implementation of the 65nm Dual-Core 64b Merom Processor.

Nabeel Sakran, Marcelo Yuffe, Moty Mehalel, Jack Doweck, Ernest Knoll, Avi Kovacs

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007