Mostafa Shaterian

Orcid: 0000-0002-0311-7410

According to our database1, Mostafa Shaterian authored at least 7 papers between 2013 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
A 4-bit active-inductor-based digitally programmable low noise amplifier (AI-DPLNA) with a tunable and reconfigurable structure.
Microelectron. J., 2024

2020
A Digitally Programmable Wide Tuning-Range Active Transformer for Inductorless BPF and DCOs.
IEEE Trans. Circuits Syst., 2020

A low-power digitally programmable neural recording amplifier with selectable multiunit activity (MUA) and local field potential (LFP) recording modes.
Microelectron. J., 2020

2018
Synthesis of a reconfigurable analog vector-sum circuit into the MTL-Based configurable blocks.
Microelectron. J., 2018

2015
MTL-based implementation of current-mode CMOS RMS-to-DC converters.
Int. J. Circuit Theory Appl., 2015

2013
An MTL-Based Configurable Block for Current-Mode Nonlinear Analog Computation.
IEEE Trans. Circuits Syst. II Express Briefs, 2013

Rank determination algorithm by current comparing for rank modulation flash memories.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013


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