Mostafa Rashdan

Orcid: 0000-0003-1250-8963

According to our database1, Mostafa Rashdan authored at least 14 papers between 2009 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2024
Automatic Generation Control of a Hybrid PV-Reheat Thermal Power System Using RIME Algorithm.
IEEE Access, 2024

2022
Efficient implementation of Montgomery modular multiplier on FPGA.
Comput. Electr. Eng., 2022

2021
FPGA-Based Optimized Design of Montgomery Modular Multiplier.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

2020
Advanced implementation of Montgomery Modular Multiplier.
Microelectron. J., 2020

2018
High-Resolution PPM for Time-Based Architectures.
Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018

2017
Multi-step and high-resolution vernier-based TDC architecture.
Proceedings of the 29th International Conference on Microelectronics, 2017

2016
Serial data link interface for memory applications.
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016

Time-based recovery technique for pulse-position and pulse-amplitude modulation interface.
Proceedings of the 28th International Conference on Microelectronics, 2016

2014
Differential-Time and Pulse-Amplitude Modulation Signaling for Serial Link Transceivers.
Proceedings of the IEEE 44th International Symposium on Multiple-Valued Logic, 2014

2013
Differential Time Signaling Data-Link Architecture.
J. Signal Process. Syst., 2013

Comparing Performance of a Multiple-Valued Time-Based Serial Data Link with Other Serial Links.
Proceedings of the 43rd IEEE International Symposium on Multiple-Valued Logic, 2013

2012
Multiple-Valued Time-Based Architecture for Serial Communication Links.
Proceedings of the 42nd IEEE International Symposium on Multiple-Valued Logic, 2012

2010
Data link design using a time-based approach.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
A new time-based architecture for serial communication links.
Proceedings of the 16th IEEE International Conference on Electronics, 2009


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