Mostafa Kishani

Orcid: 0000-0002-1900-9916

According to our database1, Mostafa Kishani authored at least 12 papers between 2011 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

2012
2014
2016
2018
2020
2022
2024
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Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Joint Optimization of Communication and Storage Latencies for Vehicular Edge Computing.
IEEE Trans. Intell. Transp. Syst., June, 2024

Reducing Computation, Communication, and Storage Latency in Vehicular Edge Computing.
Proceedings of the 99th IEEE Vehicular Technology Conference, 2024

2022
An Enterprise-Grade Open-Source Data Reduction Architecture for All-Flash Storage Systems.
Proc. ACM Meas. Anal. Comput. Syst., 2022

Reducing Storage and Communication Latencies in Vehicular Edge Cloud.
Proceedings of the 2022 Joint European Conference on Networks and Communications & 6G Summit, 2022

2021
PADSA: Priority-Aware Block Data Storage Architecture for Edge Cloud Serving Autonomous Vehicles.
Proceedings of the 13th IEEE Vehicular Networking Conference, 2021

2020
A Modeling Framework for Reliability of Erasure Codes in SSD Arrays.
IEEE Trans. Computers, 2020

2019
Dependability Analysis of Data Storage Systems in Presence of Soft Errors.
IEEE Trans. Reliab., 2019

2018
Modeling Impact of Human Errors on the Data Unavailability and Data Loss of Storage Systems.
IEEE Trans. Reliab., 2018

Design and Optimization of Reliable Hardware Accelerators: Leveraging the Advantages of High-Level Synthesis.
Proceedings of the 24th IEEE International Symposium on On-Line Testing And Robust System Design, 2018

2017
Evaluating impact of human errors on the availability of data storage systems.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2011
HVD: horizontal-vertical-diagonal error detecting and correcting code to protect against with soft errors.
Des. Autom. Embed. Syst., 2011

Using Silent Writes in Low-Power Traffic-Aware ECC.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2011


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