Mostafa I. Soliman

Orcid: 0000-0002-4386-8235

According to our database1, Mostafa I. Soliman authored at least 30 papers between 2002 and 2024.

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Bibliography

2024
Enhancing Bundle Delivery Efficiency in Mobile Ad-hoc Networks with a Multi-protocol Delay-Tolerant Network.
Proceedings of the 21st ACM International Conference on Computing Frontiers, 2024

2023
Lightweight Histological Tumor Classification Using a Joint Sparsity-Quantization Aware Training Framework.
IEEE Access, 2023

Cross-Domain Few-Shot Sparse-Quantization Aware Learning for Lymphoblast Detection in Blood Smear Images.
Proceedings of the Pattern Recognition - 7th Asian Conference, 2023

2022
Accelerating Data Dependence Profiling Through Abstract Interpretation of Loop Instructions.
IEEE Access, 2022

On Potentials of Few-Shot Learning for AI-Enabled Internet of Medical Things.
Proceedings of the IEEE Globecom 2022 Workshops, 2022

2015
Merging VLIW and vector processing techniques for a simple, high-performance processor architecture.
Microelectron. J., 2015

Simple super-matrix processor: Implementation and performance evaluation.
J. Parallel Distributed Comput., 2015

Simultaneous Multithreaded Matrix Processor.
J. Circuits Syst. Comput., 2015

2013
A shared matrix unit for a chip multi-core processor.
J. Parallel Distributed Comput., 2013

Design, implementation, and evaluation of a low-complexity vector-core for executing scalar/vector instructions.
J. Parallel Distributed Comput., 2013

2011
Mat-core: a decoupled matrix core extension for general-purpose processors.
Neural Parallel Sci. Comput., 2011

FPGA implementation and performance evaluation of a high throughput crypto coprocessor.
J. Parallel Distributed Comput., 2011

2010
Systemc Implementation and Performance Evaluation of a Decoupled General-Purpose Matrix Processor.
Parallel Process. Lett., 2010

Codevelopment of multi-level instruction set architecture and hardware for an efficient matrix processor.
Neural Parallel Sci. Comput., 2010

FastCrypto: parallel AES pipelines extension for general-purpose processors.
Neural Parallel Sci. Comput., 2010

2009
Exploiting ILP, TLP, and DLP to Improve Multi-Core Performance of One-Sided Jacobi SVD.
Parallel Process. Lett., 2009

Performance Evaluation of Multi-Core Intel Xeon Processors on Basic Linear Algebra Subprograms.
Parallel Process. Lett., 2009

2008
Memory hierarchy exploration for accelerating the parallel computation of SVDs.
Neural Parallel Sci. Comput., 2008

A highly efficient implementation of a backpropagation learning algorithm using matrix ISA.
J. Parallel Distributed Comput., 2008

2007
A highly efficient implementation of back propagation algorithm using matrix instruction set architecture.
Neural Parallel Sci. Comput., 2007

A Block JRS Algorithm for Highly Parallel Computation of SVDs.
Proceedings of the High Performance Computing and Communications, 2007

2005
Performance Evaluation of Blas on the Trident Processor.
Parallel Process. Lett., 2005

A Matrix Processor for Math-intensive Applications.
Proceedings of the ISCA 18th International Conference on Computer Applications in Industry and Engineering, 2005

2003
Matrix Bidiagonalization: Implementation and Evaluation on the Trident Processor.
Neural Parallel Sci. Comput., 2003

Parallel LU-decomposition on Pentium Streaming SIMD Extensions.
Proceedings of the High Performance Computing, 5th International Symposium, 2003

Matrix Bidiagonalization on the Trident Processor.
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

Trident: Technology-Scalable Architecture for Data Parallel Application.
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

BLAS on the Trident Processor: Implementation and Performance Evaluation.
Proceedings of the ISCA 18th International Conference Computers and Their Applications, 2003

2002
A Multi-level ISA Processor for Accelerating Data Parallel Applications.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2002

Performance Analysis of SVD Algorithm on the Trident Processor.
Proceedings of the 1st International Symposium on Cyber Worlds (CW 2002), 2002


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