Moslem Heidarpur

Orcid: 0000-0002-4116-0778

Affiliations:
  • University of Windsor, Canada


According to our database1, Moslem Heidarpur authored at least 17 papers between 2016 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
A High Speed and Area Efficient Processor for Elliptic Curve Scalar Point Multiplication for GF(2<sup>m</sup>).
IEEE Trans. Very Large Scale Integr. Syst., August, 2024

2023
Novel Formulations of M-Term Overlap-Free Karatsuba Binary Polynomial Multipliers and Their Hardware Implementations.
IEEE Trans. Very Large Scale Integr. Syst., October, 2023

A Resource-Efficient and High-Accuracy CORDIC-Based Digital Implementation of the Hodgkin-Huxley Neuron.
IEEE Trans. Very Large Scale Integr. Syst., September, 2023

Digital Hardware Implementations of Spiking Neural Networks With Selective Input Sparsity for Edge Inferences in Controlled Image Acquisition Environments.
IEEE Trans. Circuits Syst. II Express Briefs, May, 2023

High-Performance FPGA Implementation of Fully Connected Networks of SAM Neurons.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022
An Optimized M-Term Karatsuba-Like Binary Polynomial Multiplier for Finite Field Arithmetic.
IEEE Trans. Very Large Scale Integr. Syst., 2022

Corrections to "An Efficient and High-Speed Overlap-Free Karatsuba-Based Finite-Field Multiplier for FPGA Implementation".
IEEE Trans. Very Large Scale Integr. Syst., 2022

A High-Accuracy Digital Implementation of the Morris-Lecar Neuron With Variable Physiological Parameters.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

A Low-Resource Digital Implementation of the Fitzhugh-Nagumo Neuron.
Proceedings of the 17th Conference on Ph.D Research in Microelectronics and Electronics, 2022

Selective Input Sparsity in Spiking Neural Networks for Pattern Classification.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021
An Efficient and High-Speed Overlap-Free Karatsuba-Based Finite-Field Multiplier for FGPA Implementation.
IEEE Trans. Very Large Scale Integr. Syst., 2021

2020
Spiking Neural Networks: Modification and Digital Implementation.
PhD thesis, 2020

CORDIC-Astrocyte: Tripartite Glutamate-IP3-Ca<sup>2+</sup> Interaction Dynamics on FPGA.
IEEE Trans. Biomed. Circuits Syst., 2020

Time Step Impact on Performance and Accuracy of Izhikevich Neuron: Software Simulation and Hardware Implementation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
CORDIC-SNN: On-FPGA STDP Learning With Izhikevich Neurons.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Digital Implementation of a Biological-Plausible Model for Astrocyte Ca ^2+ Oscillations.
Proceedings of the Advances in Computational Intelligence, 2019

2016
A CORDIC Based Digital Hardware For Adaptive Exponential Integrate and Fire Neuron.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016


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