Morteza Rezaalipour

Orcid: 0000-0003-0341-421X

According to our database1, Morteza Rezaalipour authored at least 11 papers between 2018 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

2018
2019
2020
2021
2022
2023
2024
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Legend:

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Links

On csauthors.net:

Bibliography

2024
A power-efficient approximate approach to improve the computational complexity of coding tools in versatile video coding.
Multim. Tools Appl., August, 2024

Genetic Cache: A Machine Learning Approach to Designing DRAM Cache Controllers in HBM Systems.
ACM J. Emerg. Technol. Comput. Syst., July, 2024

2023
Multi-Metric SMT-Based Evaluation of Worst-Case-Error for Approximate Circuits.
Proceedings of the 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2023

A Parametrizable Template for Approximate Logic Synthesis.
Proceedings of the 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2023

ErrorEval: an Open-Source Worst-Case-Error Evaluation Framework for Approximate Computing.
Proceedings of the 20th ACM International Conference on Computing Frontiers, 2023

2021
Linear-time error calculation for approximate adders.
Comput. Electr. Eng., 2021

Memristive Data Ranking.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

2020
AxMAP: Making Approximate Adders Aware of Input Patterns.
IEEE Trans. Computers, 2020

2019
Designing energy-efficient imprecise adders with multi-bit approximation.
Microelectron. J., 2019

IDrAx: A tool-chain for designing efficient approximate adders.
Microelectron. J., 2019

2018
Designing Efficient Imprecise Adders using Multi-bit Approximate Building Blocks.
Proceedings of the International Symposium on Low Power Electronics and Design, 2018


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