Morteza Fathipour

According to our database1, Morteza Fathipour authored at least 6 papers between 2005 and 2013.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Links

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Bibliography

2013
Bottom-up design of a high performance ultra-low power DFT utilizing multiple-VDD, multiple-Vth and gate sizing.
Proceedings of the 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2013

Design of an ultra-low power 32-bit adder operating at subthreshold voltages in 45-nm FinFET.
Proceedings of the 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2013

2009
Design of a feedforward controller for AFM nanopositioning based on neural network control theory.
Proceedings of the 4th IEEE International Conference on Nano/Micro Engineered and Molecular Systems, 2009

A backstepping controller for piezoelectric actuators with hysteresis in nanopositioning.
Proceedings of the 4th IEEE International Conference on Nano/Micro Engineered and Molecular Systems, 2009

Employing work function enginnering and asymmetric gate oxide in nano-scale source-heterojunction-MOS-transistor.
Proceedings of the 2009 IEEE International Conference on Electro/Information Technology, 2009

2005
The Influence of the Stacked and Double Material Gate Structures on the Short Channel Effects in SOI MOSFETS.
IEICE Trans. Electron., 2005


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