Morteza Damavandpeyma

According to our database1, Morteza Damavandpeyma authored at least 8 papers between 2008 and 2013.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2013
Schedule-Extended Synchronous Dataflow Graphs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

Throughput-constrained DVFS for scenario-aware dataflow graphs.
Proceedings of the 19th IEEE Real-Time and Embedded Technology and Applications Symposium, 2013

2012
Parametric throughput analysis of scenario-aware dataflow graphs.
Proceedings of the 30th International IEEE Conference on Computer Design, 2012

Modeling static-order schedules in synchronous dataflow graphs.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2011
Hybrid Code-Data Prefetch-Aware Multiprocessor Task Graph Scheduling.
Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

2010
Thermal-aware scratchpad memory design and allocation.
Proceedings of the 28th International Conference on Computer Design, 2010

2008
Delay testing of PD-SOI circuits.
IEICE Electron. Express, 2008

Architectural Synthesis with Control Data Flow Extraction toward an Asynchronous CAD Tool.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008


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