Morgana Macedo Azevedo da Rosa

Orcid: 0000-0001-9582-9011

Affiliations:
  • Catholic University of Pelotas, Graduate Program on Electronic Engineering and Computing, Brazil


According to our database1, Morgana Macedo Azevedo da Rosa authored at least 26 papers between 2017 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Exploring Discrete Haar Wavelet and Cosine Transforms for Accuracy-and Energy-Quality VLSI Watermarking Systems Design.
Circuits Syst. Signal Process., December, 2024

AxRSU-2<sup>m</sup>: Higher-Order m-Bit Approximate Encoders for Radix-2<sup>m</sup> Squarer Units.
Circuits Syst. Signal Process., June, 2024

VLSI Architectures of Approximate Arithmetic Units Applied to Parallel Sensors Calibration.
IEEE Trans. Circuits Syst. I Regul. Pap., March, 2024

Exploring Approximate Adders for an Energy-Efficient Pre-Processing Pan-Tompkins Algorithm VLSI Design.
Proceedings of the 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2024

AxMOD: VLSI Modular Reduction Design Exploring Approximate Arithmetic Units.
Proceedings of the 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2024

Evaluating the Resilience of the Approximate Parallel Prefix Adder (AxPPA) Against Hardware Trojan Horse Injection.
Proceedings of the 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2024

2023
Energy-Efficient VLSI Squarer Unit with Optimized Radix-2<sup>m</sup> Multiplication Logic.
Circuits Syst. Signal Process., February, 2023

AxPPA: Approximate Parallel Prefix Adders.
IEEE Trans. Very Large Scale Integr. Syst., 2023

Exploring Security Threats by Hardware-Faults in Approximate Arithmetic Computing.
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

An Energy-Efficient StEFCal VLSI Design with Approximate Squarer and Divider Units.
Proceedings of the 14th IEEE Latin America Symposium on Circuits and System, 2023

Accuracy-, Delay- and Area-Driven Evaluation of Lower-Part Approximate Parallel Prefix Adder.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

New Energy-Efficient 3-2 and 4-2 Approximate Adder Compressors Topologies.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

An Optimized VLSI Exponential Unit Design Exploring Efficient Arithmetic Operation Strategies.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

An Ultra Low-Energy VLSI Approximate Discrete Haar Wavelet Transform for ECG Data Compression.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

2022
AxRSU: Approximate Radix-4 Squarer Unit.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Discrete Haar Wavelet Transform Hardware Design for Energy-Efficient Image Watermarking.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

An Efficient Exponential Unit Designed in VLSI CMOS with Custom Operators.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

2021
An Energy-Efficient Haar Wavelet Transform Architecture for Respiratory Signal Processing.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

Approximate Pruned and Truncated Haar Discrete Wavelet Transform VLSI Hardware for Energy-Efficient ECG Signal Processing.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

2020
Improving the Partial Product Tree Compression on Signed Radix-2<sup>m</sup> Parallel Multipliers.
Proceedings of the 18th IEEE International New Circuits and Systems Conference, 2020

Energy-Efficient Haar Transform Architectures Using Efficient Addition Schemes.
Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020

Exploring Efficient Adder Compressors for Power-Efficient Sum of Squared Differences Design.
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

The Radix-2<sup>m</sup> Squared Multiplier.
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

2019
Design Methodology to Explore Hybrid Approximate Adders for Energy-Efficient Image and Video Processing Accelerators.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

2018
Exploring power-performance-quality tradeoff of approximate adders for energy efficient sobel filtering.
Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018

2017
Exploring the use of parallel prefix adder topologies into approximate adder circuits.
Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, 2017


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