Moo Sung Chae

According to our database1, Moo Sung Chae authored at least 8 papers between 2006 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2017
Multi-standard low-power DDR I/O circuit design in 7nm CMOS process.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2012
Portable, wireless drowsiness-detection system.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

2009
A 220nW Neural Amplifier for Multi-channel Neural Recording Systems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008
Design Optimization for Integrated Neural Recording Systems.
IEEE J. Solid State Circuits, 2008

A 128-Channel 6mW Wireless Neural Recording IC with On-the-Fly Spike Sorting and UWB Tansmitter.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

A 4-channel wearable wireless neural recording system.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2006
A 512-mb DDR3 SDRAM prototype with C<sub>IO</sub> minimization and self-calibration techniques.
IEEE J. Solid State Circuits, 2006

A neural recording system for monitoring shark behavior.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006


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